SBASAL3
September 2024
ADC3669
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics - Power Consumption
5.6
Electrical Characteristics - DC Specifications
5.7
Electrical Characteristics - AC Specifications (ADC3668 - 250 MSPS)
5.8
Electrical Characteristics - AC Specifications (ADC3669 - 500 MSPS)
5.9
Timing Requirements
5.10
Typical Characteristics, ADC3668
5.11
Typical Characteristics, ADC3669
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Analog Inputs
7.3.1.1
Nyquist Zone Selection
7.3.1.2
Analog Front End Design
7.3.2
Sampling Clock Input
7.3.3
Multi-Chip Synchronization
7.3.3.1
SYSREF Monitor
7.3.4
Time-Stamp
7.3.5
Overrange
7.3.6
External Voltage Reference
7.3.7
Digital Gain
7.3.8
Decimation Filter
7.3.8.1
Uncommon Decimation Ratios
7.3.8.2
Decimation Filter Response
7.3.8.3
Decimation Filter Configuration
7.3.8.4
Numerically Controlled Oscillator (NCO)
7.3.9
Digital Interface
7.3.9.1
Parallel LVDS (DDR)
7.3.9.2
Serial LVDS (SLVDS) with Decimation
7.3.9.3
Output Data Format
7.3.9.4
32-bit Output Resolution
7.3.9.5
Output MUX
7.3.9.6
Test Pattern
7.4
Device Functional Modes
7.4.1
Low Latency Mode
7.4.2
Digital Channel Averaging
7.4.3
Power Down Mode
7.5
Programming
7.5.1
GPIO Programming
7.5.2
Register Write
7.5.3
Register Read
7.5.4
Device Programming
7.5.5
Register Map
7.5.6
Detailed Register Description
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Wideband Spectrum Analyzer
8.2.2
Design Requirements
8.2.2.1
Input Signal Path
8.2.2.2
Clocking
8.2.3
Detailed Design Procedure
8.2.3.1
Sampling Clock
8.2.4
Application Performance Plots
8.2.5
Initialization Set Up
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Third-Party Products Disclaimer
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTD|64
MPQF141C
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbasal3_oa
sbasal3_pm
6
Parameter Measurement Information
Figure 6-1
Timing Diagram: Parallel DDR LVDS
Figure 6-2
Timing Diagram: Serial LVDS (example: quad band, 16-bit, complex decimation by 8)