SBASAB5 March   2024 ADC3683-SP

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics - Power Consumption
    6. 5.6 Electrical Characteristics - DC Specifications
    7. 5.7 Electrical Characteristics - AC Specifications
    8. 5.8 Timing Requirements
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
        1. 7.3.1.1 Analog Front End Design
          1. 7.3.1.1.1 Sampling Glitch Filter Design
          2. 7.3.1.1.2 Analog Input Termination and DC Bias
            1. 7.3.1.1.2.1 AC-Coupling
            2. 7.3.1.1.2.2 DC-Coupling
        2. 7.3.1.2 Auto-Zero Feature
      2. 7.3.2 Clock Input
        1. 7.3.2.1 Single Ended vs Differential Clock Input
        2. 7.3.2.2 Signal Acquisition Time Adjust
      3. 7.3.3 Voltage Reference
        1. 7.3.3.1 Internal Voltage Reference
        2. 7.3.3.2 External Voltage Reference (VREF)
        3. 7.3.3.3 External Voltage Reference with Internal Buffer (REFBUF)
      4. 7.3.4 Digital Down Converter
        1. 7.3.4.1 DDC MUX
        2. 7.3.4.2 Digital Filter Operation
        3. 7.3.4.3 FS/4 Mixing with Real Output
        4. 7.3.4.4 Numerically Controlled Oscillator (NCO) and Digital Mixer
        5. 7.3.4.5 Decimation Filter
        6. 7.3.4.6 SYNC
        7. 7.3.4.7 Output Formatting with Decimation
      5. 7.3.5 Digital Interface
        1. 7.3.5.1 Output Formatter
        2. 7.3.5.2 Output Scrambler
        3. 7.3.5.3 Output Bit Mapper
          1. 7.3.5.3.1 2-Wire Mode
          2. 7.3.5.3.2 1-Wire Mode
          3. 7.3.5.3.3 ½-Wire Mode
        4. 7.3.5.4 Output Interface or Mode Configuration
          1. 7.3.5.4.1 Configuration Example
        5. 7.3.5.5 Output Data Format
      6. 7.3.6 Test Pattern
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Power Down Options
      3. 7.4.3 Digital Channel Averaging
    5. 7.5 Programming
      1. 7.5.1 Configuration using PINs only
      2. 7.5.2 Configuration using the SPI interface
        1. 7.5.2.1 Register Write
        2. 7.5.2.2 Register Read
  9. 8 Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Signal Path
        2. 8.2.2.2 Sampling Clock
        3. 8.2.2.3 Voltage Reference
      3. 8.2.3 Application Curves
    3. 8.3 Initialization Set Up
      1. 8.3.1 Register Initialization During Operation
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Register Map
    1. 9.1 Detailed Register Description
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HBP|64
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Electrical Characteristics - AC Specifications

Typical values are at TA = 25°C, full temperature range is TMIN = –55°C to TMAX = 105°C, ADC sampling rate = 65 MSPS, 50% clock duty cycle, AVDD = IOVDD = 1.8 V, 1.6 V external reference, and –1-dBFS differential input, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ADC3683-SP - 65 MSPS:
NSD Noise Spectral Density fIN = 1.1 MHz, AIN = –20 dBFS –160 dBFS/Hz
SNR Signal to noise ratio fIN = 1.1 MHz, AIN = –20 dBFS 84.8 dBFS
fIN = 1.1 MHz 84.2
fIN = 5 MHz 78.5 83.6
fIN = 10 MHz 83.6
fIN = 20 MHz 82.6
fIN = 40 MHz 81.0
fIN = 70 MHz 77.3
SINAD Signal to noise and distortion ratio fIN = 1.1 MHz 80.0 dBFS
fIN = 5 MHz 82.7
fIN = 10 MHz 82.7
fIN = 20 MHz 80.2
fIN = 40 MHz 78.7
fIN = 70 MHz 75.8
ENOB Effective number of bits fIN = 1.1 MHz 13.7 bits
fIN = 5 MHz 13.6
fIN = 10 MHz 13.6
fIN = 20 MHz 13.4
fIN = 40 MHz 13.2
fIN = 70 MHz 12.5
THD Total Harmonic Distortion (First five harmonics) fIN = 1.1 MHz 81 dBc
fIN = 5 MHz 80.5 88
fIN = 10 MHz 89
fIN = 20 MHz 83
fIN = 40 MHz 82
fIN = 70 MHz 80
SFDR Spur free dynamic range including second and third harmonic distortion fIN = 1.1 MHz 82 dBc
fIN = 5 MHz 81.5 89
fIN = 10 MHz 92
fIN = 20 MHz 85
fIN = 40 MHz 84
fIN = 70 MHz 82
Non HD2,3 Spur free dynamic range (excluding HD2 and HD3) fIN = 1.1 MHz 101 dBFS
fIN = 5 MHz 84 101
fIN = 10 MHz 100
fIN = 20 MHz 97
fIN = 40 MHz 91
fIN = 70 MHz 88
IMD3 Two tone inter-modulation distortion f1 = 10 MHz, f2 = 12 MHz, AIN = -7 dBFS/tone 83 dBc
f1 = 40 MHz, f2 = 45 MHz, AIN = -7 dBFS/tone 78