ADC3683-SP
Radiation-hardness-assured (RHA), QMLV, 300-krad, 18-bit, 2-channel 65MSPS low-latency low-power ADC
ADC3683-SP
- Space screening and radiation performance
- QML-V screening and reliability
- Total ionizing dose (TID): 300 krad (Si)
- Single event latchup (SEL): 75 MeV-cm2/mg
- Ambient temperature range: −55°C to 105°C
- Dual channel ADC
- 18-bit 65MSPS
- Noise Floor: -160dBFS/Hz
- Low power and optimized power scaling: 50mW/ch (10MSPS) to 94mW/ch (65MSPS)
- Latency: 1-2 clock cycles
- 18-bit, no missing codes
- INL: ±9, DNL: ±0.7 LSB (typical)
- Reference: external or internal
- Input bandwidth: 140MHz (–3dB)
- On-chip digital filter (optional)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- Serial LVDS digital interface (2-, 1- and 1/2-wire)
- Spectral performance (fIN = 5MHz):
- SNR: 83.5dBFS
- SFDR: 87dBc HD2, HD3
- SFDR: 99dBFS worst spur
The ADC3683-SP is a low noise, ultra-low power 18-bit 65MSPS high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of −160dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SP offers DC precision together with IF sampling support making it designed for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94mW/ch at 65Msps and the power consumption scales well with lower sampling rates.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is pin-to-pin compatible with the 14-bit, 125MSPS ADC3664-SP. The device comes in a 64-pin CFP package (10.9mm x 10.9mm), and supports a temperature range from −55°C to +105°C.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | ADC3683-SP Space Grade 18-Bit 1 to 65MSPS, Low Noise, Ultra-low Power Dual Channel ADC datasheet | PDF | HTML | 08 Mar 2024 |
* | Radiation & reliability report | ADC3683-SP Single Event Effects Report (Rev. A) | PDF | HTML | 08 Jul 2024 |
EVM User's guide | ADC36xxEVMCVAL Evaluation Module User's Guide | PDF | HTML | 04 Dec 2023 |
Design & development
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ADC3683EVMCVAL — ADC3683-SP evaluation module
<p>The ADC3683EVMCVAL is used to evaluate the ADC3683-SP analog-to-digital converter (ADC). ADC3683-SP uses a serial low-voltage differential signaling (LVDS) interface to output the digital data. The serialized LVDS interface supports output rates up to 1Gbps. ADC3683-SP can be operated in (...)
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
CFP (HBP) | 64 | Ultra Librarian |
Ordering & quality
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