Product details

Resolution (bps) 16 Number of DAC channels 1 Interface type SPI Output type Unbuffered Voltage Output voltage range (V) 0 to 5.5 INL (max) (±LSB) 1 Settling time (µs) 1 Reference type Ext Architecture R-2R Rating Catalog Sample/update rate (Msps) 1 Power consumption (typ) (mW) 0.015 Operating temperature range (°C) -40 to 85 Product type Precision DAC
Resolution (bps) 16 Number of DAC channels 1 Interface type SPI Output type Unbuffered Voltage Output voltage range (V) 0 to 5.5 INL (max) (±LSB) 1 Settling time (µs) 1 Reference type Ext Architecture R-2R Rating Catalog Sample/update rate (Msps) 1 Power consumption (typ) (mW) 0.015 Operating temperature range (°C) -40 to 85 Product type Precision DAC
SOIC (D) 8 29.4 mm² 4.9 x 6
  • 16-Bit Resolution
  • 2.7 V to 5.5 V Single-Supply Operation
  • Very Low Power: 15 µW for 3 V Power
  • High Accuracy, INL: 1 LSB
  • Low Noise: 10 nV/Hz
  • Fast Settling: 1.0 µS
  • Fast SPI™ Interface, up to 50 MHz
  • Reset to Zero-Code
  • Schmitt-Trigger Inputs for Direct Optocoupler Interface
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Portable Equipment
    • Automatic Test Equipment
    • Industrial Process Control
    • Data Acquisition Systems
    • Optical Networking

SPI, QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.
All other trademarks are the property of their respective owners.

  • 16-Bit Resolution
  • 2.7 V to 5.5 V Single-Supply Operation
  • Very Low Power: 15 µW for 3 V Power
  • High Accuracy, INL: 1 LSB
  • Low Noise: 10 nV/Hz
  • Fast Settling: 1.0 µS
  • Fast SPI™ Interface, up to 50 MHz
  • Reset to Zero-Code
  • Schmitt-Trigger Inputs for Direct Optocoupler Interface
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Portable Equipment
    • Automatic Test Equipment
    • Industrial Process Control
    • Data Acquisition Systems
    • Optical Networking

SPI, QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.
All other trademarks are the property of their respective owners.

The DAC8830 and DAC8831 are single, 16-bit, serial-input, voltage-output digital-to-analog converters (DACs) operating from a single 3 V to 5 V power supply. These converters provide excellent linearity (1 LSB INL), low glitch, low noise, and fast settling (1.0 µS to 1/2 LSB of full-scale output) over the specified temperature range of -40°C to +85°C. The output is unbuffered, which reduces the power consumption and the error introduced by the buffer.

These parts feature a standard high-speed (clock up to 50 MHz), 3 V or 5 V SPI serial interface to communicate with a DSP or microprocessor.

The DAC8830 output is 0 V to VREF. However, the DAC8831 provides bipolar output (±VREF) when working with an external buffer. The DAC8830 and DAC8831 are both reset to zero code after power up. For optimum performance, a set of Kelvin connections to external reference and analog ground input are provided on the DAC8831.

The DAC8830 is available in an SO-8 package, and the DAC8831 in an SO-14 package. Both have industry standard pinouts. The DAC8831 is also available in a QFN-14 package.

The DAC8830 and DAC8831 are single, 16-bit, serial-input, voltage-output digital-to-analog converters (DACs) operating from a single 3 V to 5 V power supply. These converters provide excellent linearity (1 LSB INL), low glitch, low noise, and fast settling (1.0 µS to 1/2 LSB of full-scale output) over the specified temperature range of -40°C to +85°C. The output is unbuffered, which reduces the power consumption and the error introduced by the buffer.

These parts feature a standard high-speed (clock up to 50 MHz), 3 V or 5 V SPI serial interface to communicate with a DSP or microprocessor.

The DAC8830 output is 0 V to VREF. However, the DAC8831 provides bipolar output (±VREF) when working with an external buffer. The DAC8830 and DAC8831 are both reset to zero code after power up. For optimum performance, a set of Kelvin connections to external reference and analog ground input are provided on the DAC8831.

The DAC8830 is available in an SO-8 package, and the DAC8831 in an SO-14 package. Both have industry standard pinouts. The DAC8831 is also available in a QFN-14 package.

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Technical documentation

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Type Title Date
* Data sheet 16-Bit, Ultra-Low Power, Voltage Output Digital-to-Analog Converters datasheet (Rev. D) 14 Sep 2007
Circuit design Loop powered 4- to 20-mA transmitter circuit (Rev. A) PDF | HTML 19 Sep 2024
Circuit design Programmable low-side current sink circuit (Rev. A) PDF | HTML 19 Sep 2024
Circuit design Unipolar voltage output DAC to bipolar voltage output circuit (Rev. A) PDF | HTML 19 Sep 2024
Application note Analog Time Gain Control (ATGC) Solutions for TI’s Ultrasound AFE PDF | HTML 18 May 2023
Application note Time Gain Control (Compensation) in Ultrasound Applications 02 Dec 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

DAC8830 IBIS Model

SLAM092.ZIP (7 KB) - IBIS Model
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

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Simulation tool

TINA-TI — SPICE-based analog simulation program

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User guide: PDF
Reference designs

TIDA-01504 — Highly-Accurate, Loop-Powered, 4mA to 20mA Field Transmitter With HART® Modem Reference Design

This reference design provides a solution for a loop-powered, highly-accurate, field (sensor) transmitter with a HART® modem. The design uses a partially-discrete 4-mA to 20-mA current transmitter, HART modem, microcontroller, and power conditioning blocks in realizing a smart field (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01402 — High-Precision Reference Design for Buffering a DAC Signal

This reference design features the industry's first zero-crossover and zero-drift amplifier (OPA388) to buffer the analog output of a digital-to-analog converter (DAC). It demonstrates the importance of the zero-crossover and zero-drift feature and how they can minimize the integral non-linearity (...)
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Schematic: PDF
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SOIC (D) 8 Ultra Librarian

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