SBAS661C February   2015  – May 2021 ADS1262 , ADS1263

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Serial Interface
    7. 7.7 Switching Characteristics: Serial Interface
    8. 7.8 Timing Diagrams
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Offset Temperature Drift Measurement
    2. 8.2 Gain Temperature Drift Measurement
    3. 8.3 Common-Mode Rejection Ratio Measurement
    4. 8.4 Power-Supply Rejection Ratio Measurement
    5. 8.5 Crosstalk Measurement (ADS1263)
    6. 8.6 Reference-Voltage Temperature-Drift Measurement
    7. 8.7 Reference-Voltage Thermal-Hysteresis Measurement
    8. 8.8 Noise Performance
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Multifunction Analog Inputs
      2. 9.3.2  Analog Input Description
        1. 9.3.2.1 ESD Diode
        2. 9.3.2.2 Input Multiplexer
      3. 9.3.3  Sensor Bias
      4. 9.3.4  Temperature Sensor
      5. 9.3.5  Power-Supply Monitor
      6. 9.3.6  PGA
      7. 9.3.7  PGA Voltage Overrange Monitors
        1. 9.3.7.1 PGA Differential Output Monitor
        2. 9.3.7.2 PGA Absolute Output-Voltage Monitor
      8. 9.3.8  ADC Reference Voltage
        1. 9.3.8.1 Internal Reference
        2. 9.3.8.2 External Reference
        3. 9.3.8.3 Power-Supply Reference
        4. 9.3.8.4 Low-Reference Monitor
      9. 9.3.9  ADC1 Modulator
      10. 9.3.10 Digital Filter
        1. 9.3.10.1 Sinc Filter Mode
          1. 9.3.10.1.1 Sinc Filter Frequency Response
        2. 9.3.10.2 FIR Filter
        3. 9.3.10.3 50-Hz and 60-Hz Line Cycle Rejection
      11. 9.3.11 Sensor-Excitation Current Sources (IDAC1 and IDAC2)
      12. 9.3.12 Level-Shift Voltage
      13. 9.3.13 General-Purpose Input/Output (GPIO)
      14. 9.3.14 Test DAC (TDAC)
      15. 9.3.15 ADC2 (ADS1263)
        1. 9.3.15.1 ADC2 Inputs
        2. 9.3.15.2 ADC2 PGA
        3. 9.3.15.3 ADC2 Reference
        4. 9.3.15.4 ADC2 Modulator
        5. 9.3.15.5 ADC2 Digital Filter
    4. 9.4 Device Functional Modes
      1. 9.4.1  Conversion Control
        1. 9.4.1.1 Continuous Conversion Mode
        2. 9.4.1.2 Pulse Conversion Mode
        3. 9.4.1.3 ADC2 Conversion Control (ADS1263)
      2. 9.4.2  Conversion Latency
      3. 9.4.3  Programmable Time Delay
      4. 9.4.4  Serial Interface
        1. 9.4.4.1 Chip Select (CS)
        2. 9.4.4.2 Serial Clock (SCLK)
        3. 9.4.4.3 Data Input (DIN)
        4. 9.4.4.4 Data Output/Data Ready (DOUT/DRDY)
        5. 9.4.4.5 Serial Interface Autoreset
      5. 9.4.5  Data Ready Pin (DRDY)
      6. 9.4.6  Conversion Data Software Polling
      7. 9.4.7  Read Conversion Data
        1. 9.4.7.1 Read Data Direct (ADC1 Only)
        2. 9.4.7.2 Read Data by Command
        3. 9.4.7.3 Data-Byte Sequence
          1. 9.4.7.3.1 Status Byte
          2. 9.4.7.3.2 Data Byte Format
          3. 9.4.7.3.3 Checksum Byte (CRC/CHK)
            1. 9.4.7.3.3.1 Checksum Mode (CRC[1:0] = 01h)
          4. 9.4.7.3.4 CRC Mode (CRC[1:0] = 10h)
      8. 9.4.8  ADC Clock Modes
        1. 9.4.8.1 Internal Oscillator
        2. 9.4.8.2 External Clock
        3. 9.4.8.3 Crystal Oscillator
      9. 9.4.9  Calibration
        1. 9.4.9.1 Offset and Full-Scale Calibration
          1. 9.4.9.1.1 Offset Calibration Registers
          2. 9.4.9.1.2 Full-Scale Calibration Registers
        2. 9.4.9.2 ADC1 Offset Self-Calibration (SFOCAL1)
        3. 9.4.9.3 ADC1 Offset System Calibration (SYOCAL1)
        4. 9.4.9.4 ADC2 Offset Self-Calibration ADC2 (SFOCAL2)
        5. 9.4.9.5 ADC2 Offset System Calibration ADC2 (SYOCAL2)
        6. 9.4.9.6 ADC1 Full-Scale System Calibration (SYGCAL1)
        7. 9.4.9.7 ADC2 Full-Scale System Calibration ADC2 (SYGCAL2)
        8. 9.4.9.8 Calibration Command Procedure
        9. 9.4.9.9 User Calibration Procedure
      10. 9.4.10 Reset
        1. 9.4.10.1 Power-On Reset (POR)
        2. 9.4.10.2 RESET/PWDN Pin
        3. 9.4.10.3 Reset by Command
      11. 9.4.11 Power-Down Mode
      12. 9.4.12 Chop Mode
    5. 9.5 Programming
      1. 9.5.1 NOP Command
      2. 9.5.2 RESET Command
      3. 9.5.3 START1, STOP1, START2, STOP2 Commands
      4. 9.5.4 RDATA1, RDATA2 Commands
      5. 9.5.5 SYOCAL1, SYGCAL1, SFOCAL1, SYOCAL2, SYGCAL2, SFOCAL2 Commands
      6. 9.5.6 RREG Command
      7. 9.5.7 WREG Command
    6. 9.6 Register Maps
      1. 9.6.1  Device Identification Register (address = 00h) [reset = x]
      2. 9.6.2  Power Register (address = 01h) [reset = 11h]
      3. 9.6.3  Interface Register (address = 02h) [reset = 05h]
      4. 9.6.4  Mode0 Register (address = 03h) [reset = 00h]
      5. 9.6.5  Mode1 Register (address = 04h) [reset = 80h]
      6. 9.6.6  Mode2 Register (address = 05h) [reset = 04h]
      7. 9.6.7  Input Multiplexer Register (address = 06h) [reset = 01h]
      8. 9.6.8  Offset Calibration Registers (address = 07h, 08h, 09h) [reset = 00h, 00h, 00h]
      9. 9.6.9  Full-Scale Calibration Registers (address = 0Ah, 0Bh, 0Ch) [reset = 40h, 00h, 00h]
      10. 9.6.10 IDACMUX Register (address = 0Dh) [reset = BBh]
      11. 9.6.11 IDACMAG Register (address = 0Eh) [reset = 00h]
      12. 9.6.12 REFMUX Register (address = 0Fh) [reset = 00h]
      13. 9.6.13 TDACP Control Register (address = 10h) [reset = 00h]
      14. 9.6.14 TDACN Control Register (address = 11h) [reset = 00h]
      15. 9.6.15 GPIO Connection Register (address = 12h) [reset = 00h]
      16. 9.6.16 GPIO Direction Register (address = 13h) [reset = 00h]
      17. 9.6.17 GPIO Data Register (address = 14h) [reset = 00h]
      18. 9.6.18 ADC2 Configuration Register (address = 15h) [reset = 00h]
      19. 9.6.19 ADC2 Input Multiplexer Register (address = 16h) [reset = 01h]
      20. 9.6.20 ADC2 Offset Calibration Registers (address = 17h, 18h) [reset = 00h, 00h]
      21. 9.6.21 ADC2 Full-Scale Calibration Registers (address = 19h, 1Ah) [reset = 00h, 40h]
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Isolated (or Floated) Inputs
      2. 10.1.2 Single-Ended Measurements
      3. 10.1.3 Differential Measurements
      4. 10.1.4 Input Range
      5. 10.1.5 Input Filtering
        1. 10.1.5.1 Aliasing
      6. 10.1.6 Input Overload
      7. 10.1.7 Unused Inputs and Outputs
      8. 10.1.8 Voltage Reference
      9. 10.1.9 Serial Interface Connections
    2. 10.2 Typical Application
      1. 10.2.1 3-Wire RTD Measurement with Lead-Wire Compensation
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
    3. 10.3 What To Do and What Not To Do
    4. 10.4 Initialization Setup
  11. 11Power Supply Recommendations
    1. 11.1 Power-Supply Decoupling
    2. 11.2 Analog Power-Supply Clamp
    3. 11.3 Power-Supply Sequencing
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Noise Performance

The ADC noise performance depends on the following ADC settings: PGA gain, data rate, digital filter mode, and chop mode. Generally, the lowest input-referred noise is achieved using the highest gain possible, consistent with the input signal range. Do not set the gain too high or the result is ADC overrange. Noise also depends on the output data rate and mode of the digital filter. As the data rate reduces, the ADC bandwidth correspondingly reduces. As the order of the digital filter mode increases, the ADC bandwidth also reduces. This reduction in total bandwidth results in lower overall noise. The ADC noise is reduced by a factor of 1.4 with chop mode enabled.

Table 8-1 lists ADC1 noise performance in units of μVRMS (RMS = root mean square) under the conditions shown. The values in parenthesis are peak-to-peak values. Table 8-2 lists the noise performance in effective number of bits (ENOB) with an external 5-V reference voltage. The values shown in parenthesis are noise-free bits. The definition of noise-free bits is the resolution of the ADC with no code flicker. The noise-free bits data are based on the µVPP values. Note that for data rate = 38400 SPS, noise scales with increased reference voltage. For all other data rates, noise does not scale with reference voltage.

Table 8-3 lists the noise performance of ADC2 (ADS1263) in units of μVRMS and (µVP–P). The values in parenthesis are peak-to-peak values. Table 8-4 lists the ENOB and noise-free bits of ADC2.

The ENOB and noise-free bits shown in the tables are calculated using Equation 8:

Equation 8. ENOB = ln (FSR / VNRMS) / ln (2)

where

  • FSR = full scale range = 2 · VREF/Gain
  • VNRMS = Input referred noise voltage

Achieve maximum ENOB with maximum FSR. For ADC1, achieve maximum FSR with VREF = 5 V and the PGA bypassed. If the PGA is enabled, the FSR is limited by the PGA input range (see the Section 7.5 table.) For ADC2, achieve maximum FSR with VREF = 5 V and gains = 1, 2, or 4. If gain = 8 to 128, then FSR is limited by the PGA input range (see the Section 7.5 table).

For ADC1 operation, if the reference voltage is equal to 5 V and the PGA is enabled, the available FSR is restricted because of the limited PGA range specification. For ADC2 operation, if the reference voltage is equal to 5 V, The FSR is reduced for ADC2 gains equal to or greater than eight because of the limited PGA range.

The data shown in the noise performance tables represent typical ADC performance at TA = 25°C. The noise-performance data are the standard deviation and peak-to-peak computations of the ADC data. Because of the statistical nature of noise, repeated noise measurements may yield higher or lower noise results. The noise data are acquired with inputs shorted, from consecutive ADC readings for a period of ten seconds or 8192 data points, whichever occurs first.

Table 8-1 ADC1 Noise in µVRMS (µVPP) at TA = 25°C, VAVDD = 5 V, VAVSS = 0 V, VREF = 2.5 V
DATA RATE FILTER MODE GAIN
1 2 4 8 16 32
2.5 SPS FIR 0.145 (0.637) 0.071 (0.279) 0.038 (0.149) 0.023 (0.089) 0.014 (0.064) 0.011 (0.051)
2.5 SPS Sinc1 0.121 (0.510) 0.058 (0.249) 0.033 (0.143) 0.018 (0.073) 0.012 (0.054) 0.008 (0.037)
2.5 SPS Sinc2 0.101 (0.437) 0.055 (0.225) 0.025 (0.104) 0.015 (0.064) 0.010 (0.043) 0.007 (0.031)
2.5 SPS Sinc3 0.080 (0.307) 0.046 (0.195) 0.026 (0.116) 0.013 (0.052) 0.008 (0.034) 0.006 (0.023)
2.5 SPS Sinc4 0.080 (0.308) 0.043 (0.180) 0.020 (0.078) 0.013 (0.049) 0.008 (0.031) 0.007 (0.027)
5 SPS FIR 0.206 (1.007) 0.098 (0.448) 0.054 (0.252) 0.028 (0.123) 0.020 (0.098) 0.015 (0.073)
5 SPS Sinc1 0.161 (0.726) 0.090 (0.432) 0.047 (0.246) 0.026 (0.120) 0.017 (0.083) 0.012 (0.057)
5 SPS Sinc2 0.146 (0.661) 0.069 (0.308) 0.038 (0.195) 0.021 (0.100) 0.013 (0.061) 0.011 (0.050)
5 SPS Sinc3 0.128 (0.611) 0.067 (0.325) 0.033 (0.153) 0.019 (0.095) 0.012 (0.054) 0.010 (0.046)
5 SPS Sinc4 0.122 (0.587) 0.063 (0.269) 0.030 (0.144) 0.017 (0.076) 0.011 (0.048) 0.008 (0.039)
10 SPS FIR 0.284 (1.418) 0.142 (0.753) 0.077 (0.379) 0.041 (0.197) 0.027 (0.156) 0.023 (0.118)
10 SPS Sinc1 0.229 (1.220) 0.123 (0.662) 0.060 (0.322) 0.035 (0.177) 0.023 (0.118) 0.018 (0.103)
10 SPS Sinc2 0.193 (1.019) 0.093 (0.488) 0.048 (0.254) 0.028 (0.149) 0.019 (0.099) 0.016 (0.079)
10 SPS Sinc3 0.176 (0.896) 0.088 (0.452) 0.043 (0.217) 0.028 (0.137) 0.018 (0.091) 0.014 (0.067)
10 SPS Sinc4 0.164 (0.788) 0.076 (0.389) 0.040 (0.200) 0.024 (0.119) 0.016 (0.081) 0.013 (0.065)
16.6 SPS Sinc1 0.306 (1.708) 0.147 (0.810) 0.077 (0.436) 0.044 (0.250) 0.030 (0.176) 0.024 (0.138)
16.6 SPS Sinc2 0.248 (1.401) 0.122 (0.729) 0.068 (0.403) 0.037 (0.213) 0.024 (0.136) 0.020 (0.111)
16.6 SPS Sinc3 0.216 (1.221) 0.120 (0.667) 0.060 (0.332) 0.033 (0.197) 0.022 (0.130) 0.017 (0.095)
16.6 SPS Sinc4 0.214 (1.169) 0.101 (0.544) 0.054 (0.302) 0.031 (0.175) 0.022 (0.129) 0.016 (0.092)
20 SPS FIR 0.393 (2.467) 0.191 (1.102) 0.104 (0.603) 0.057 (0.353) 0.039 (0.222) 0.030 (0.167)
20 SPS Sinc1 0.336 (1.861) 0.167 (0.964) 0.085 (0.486) 0.049 (0.266) 0.033 (0.191) 0.026 (0.138)
20 SPS Sinc2 0.270 (1.560) 0.136 (0.745) 0.070 (0.376) 0.039 (0.231) 0.028 (0.149) 0.021 (0.111)
20 SPS Sinc3 0.237 (1.415) 0.124 (0.701) 0.067 (0.399) 0.035 (0.192) 0.024 (0.130) 0.020 (0.109)
20 SPS Sinc4 0.229 (1.285) 0.113 (0.612) 0.060 (0.325) 0.034 (0.193) 0.022 (0.123) 0.017 (0.098)
50 SPS Sinc1 0.514 (2.925) 0.255 (1.584) 0.140 (0.940) 0.077 (0.457) 0.051 (0.315) 0.042 (0.264)
50 SPS Sinc2 0.426 (2.400) 0.209 (1.217) 0.108 (0.666) 0.064 (0.381) 0.042 (0.265) 0.033 (0.200)
50 SPS Sinc3 0.389 (2.324) 0.196 (1.185) 0.104 (0.624) 0.057 (0.367) 0.038 (0.228) 0.030 (0.179)
50 SPS Sinc4 0.358 (2.319) 0.175 (1.023) 0.096 (0.597) 0.055 (0.319) 0.036 (0.217) 0.028 (0.176)
60 SPS Sinc1 0.558 (3.574) 0.285 (1.703) 0.151 (0.913) 0.085 (0.515) 0.055 (0.335) 0.045 (0.271)
60 SPS Sinc2 0.465 (2.753) 0.235 (1.424) 0.121 (0.760) 0.068 (0.417) 0.046 (0.276) 0.036 (0.208)
60 SPS Sinc3 0.414 (2.704) 0.208 (1.187) 0.112 (0.655) 0.064 (0.396) 0.042 (0.276) 0.034 (0.197)
60 SPS Sinc4 0.383 (2.288) 0.195 (1.174) 0.105 (0.623) 0.059 (0.347) 0.040 (0.242) 0.031 (0.188)
100 SPS Sinc1 0.734 (4.715) 0.361 (2.276) 0.192 (1.209) 0.108 (0.679) 0.071 (0.473) 0.058 (0.362)
100 SPS Sinc2 0.604 (3.662) 0.305 (1.934) 0.156 (1.072) 0.088 (0.579) 0.059 (0.371) 0.048 (0.321)
100 SPS Sinc3 0.531 (3.431) 0.277 (1.780) 0.143 (0.935) 0.081 (0.545) 0.054 (0.343) 0.043 (0.288)
100 SPS Sinc4 0.511 (3.340) 0.255 (1.632) 0.134 (0.861) 0.076 (0.479) 0.050 (0.322) 0.041 (0.271)
400 SPS Sinc1 1.438 (10.374) 0.734 (5.410) 0.380 (2.657) 0.215 (1.469) 0.143 (1.066) 0.116 (0.843)
400 SPS Sinc2 1.186 (8.523) 0.607 (4.333) 0.313 (2.280) 0.178 (1.313) 0.119 (0.884) 0.095 (0.676)
400 SPS Sinc3 1.072 (7.923) 0.550 (3.999) 0.285 (1.991) 0.161 (1.132) 0.107 (0.781) 0.087 (0.630)
400 SPS Sinc4 0.995 (7.107) 0.508 (3.664) 0.266 (1.947) 0.151 (1.061) 0.101 (0.708) 0.081 (0.583)
1200 SPS Sinc1 2.451 (17.755) 1.254 (9.305) 0.651 (5.044) 0.368 (2.807) 0.244 (1.846) 0.197 (1.519)
1200 SPS Sinc2 2.038 (15.480) 1.037 (8.128) 0.545 (4.107) 0.309 (2.315) 0.205 (1.586) 0.165 (1.283)
1200 SPS Sinc3 1.858 (14.005) 0.960 (7.223) 0.494 (3.833) 0.281 (2.145) 0.186 (1.374) 0.148 (1.094)
1200 SPS Sinc4 1.743 (13.428) 0.890 (6.585) 0.459 (3.405) 0.261 (2.018) 0.174 (1.337) 0.139 (1.032)
2400 SPS Sinc1 3.411 (26.095) 1.724 (13.528) 0.903 (6.609) 0.510 (3.920) 0.335 (2.626) 0.270 (2.107)
2400 SPS Sinc2 2.870 (21.677) 1.468 (11.032) 0.770 (5.932) 0.435 (3.379) 0.286 (2.123) 0.230 (1.758)
2400 SPS Sinc3 2.656 (20.100) 1.337 (9.936) 0.705 (5.355) 0.395 (3.035) 0.262 (1.951) 0.211 (1.533)
2400 SPS Sinc4 2.475 (19.447) 1.262 (9.452) 0.657 (4.966) 0.371 (2.869) 0.245 (1.885) 0.198 (1.576)
4800 SPS Sinc1 4.590 (34.155) 2.329 (17.298) 1.221 (8.943) 0.682 (5.252) 0.446 (3.239) 0.361 (2.957)
4800 SPS Sinc2 4.091 (30.903) 2.070 (15.168) 1.077 (8.141) 0.606 (4.777) 0.398 (2.986) 0.321 (2.397)
4800 SPS Sinc3 3.720 (28.423) 1.894 (14.842) 0.998 (7.626) 0.560 (4.176) 0.367 (2.890) 0.297 (2.211)
4800 SPS Sinc4 3.535 (27.437) 1.784 (13.760) 0.926 (7.273) 0.527 (4.004) 0.349 (2.626) 0.277 (2.184)
7200 SPS Sinc1 5.326 (42.076) 2.709 (19.749) 1.407 (11.126) 0.792 (5.784) 0.516 (3.881) 0.409 (3.189)
7200 SPS Sinc2 4.867 (36.820) 2.467 (18.627) 1.280 (9.874) 0.726 (5.612) 0.472 (3.531) 0.379 (2.792)
7200 SPS Sinc3 4.567 (35.194) 2.310 (17.516) 1.209 (9.036) 0.682 (5.181) 0.445 (3.590) 0.359 (2.666)
7200 SPS Sinc4 4.365 (34.008) 2.211 (17.432) 1.143 (8.804) 0.642 (5.075) 0.426 (3.261) 0.341 (2.467)
14400 SPS Sinc5 6.377 (48.242) 3.235 (25.178) 1.675 (12.508) 0.929 (7.280) 0.596 (4.430) 0.466 (3.524)
19200 SPS Sinc5 8.720 (65.389) 4.432 (32.931) 2.285 (17.055) 1.227 (9.870) 0.747 (5.725) 0.555 (4.058)
38400 SPS Sinc5 103.55 (759.91) 51.76 (371.46) 25.95 (192.20) 13.02 (99.09) 6.493 (46.060) 3.276 (24.435)
Table 8-2 ADC1 ENOB (Noise Free Bits) at TA = 25°C, VAVDD = 5 V, VAVSS = 0 V, VREF = 5 V
DATA RATE FILTER MODE GAIN
1 (BYPASS) 2 4 8 16 32
2.5 SPSFIR26.0 (23.9)25.9 (23.9)25.8 (23.8)25.5 (23.6)25.4 (23.0)24.6 (22.4)
2.5 SPSSinc126.3 (24.2)26.2 (24.1)26.0 (23.9)25.9 (23.8)25.6 (23.3)25.0 (22.8)
2.5 SPSSinc226.6 (24.4)26.3 (24.2)26.4 (24.3)26.1 (24.0)25.8 (23.6)25.2 (23.1)
2.5 SPSSinc326.9 (25.0)26.5 (24.4)26.3 (24.2)26.3 (24.3)26.1 (23.9)25.6 (23.5)
2.5 SPSSinc426.9 (25.0)26.6 (24.5)26.7 (24.7)26.3 (24.4)26.2 (24.1)25.2 (23.3)
5 SPSFIR25.5 (23.2)25.4 (23.2)25.3 (23.1)25.2 (23.1)24.8 (22.4)24.1 (21.9)
5 SPSSinc125.9 (23.7)25.5 (23.3)25.5 (23.1)25.4 (23.1)25.0 (22.7)24.4 (22.2)
5 SPSSinc226.0 (23.9)25.9 (23.8)25.8 (23.4)25.7 (23.4)25.4 (23.1)24.6 (22.4)
5 SPSSinc326.2 (24.0)26.0 (23.7)26.0 (23.8)25.8 (23.5)25.6 (23.3)24.7 (22.5)
5 SPSSinc426.3 (24.0)26.1 (24.0)26.1 (23.9)25.9 (23.8)25.7 (23.5)25.0 (22.8)
10 SPSFIR25.1 (22.7)24.9 (22.5)24.8 (22.5)24.7 (22.4)24.4 (21.8)23.5 (21.2)
10 SPSSinc125.4 (23.0)25.1 (22.7)25.1 (22.7)24.9 (22.6)24.6 (22.2)23.8 (21.4)
10 SPSSinc225.6 (23.2)25.5 (23.1)25.4 (23.0)25.2 (22.8)24.9 (22.4)24.1 (21.7)
10 SPSSinc325.8 (23.4)25.6 (23.2)25.6 (23.3)25.2 (22.9)25.0 (22.5)24.2 (22.0)
10 SPSSinc425.9 (23.6)25.8 (23.4)25.7 (23.4)25.5 (23.1)25.1 (22.7)24.4 (22.0)
16.6 SPSSinc125.0 (22.5)24.8 (22.4)24.8 (22.3)24.6 (22.1)24.2 (21.6)23.5 (20.9)
16.6 SPSSinc225.3 (22.8)25.1 (22.5)24.9 (22.4)24.8 (22.3)24.6 (21.9)23.7 (21.2)
16.6 SPSSinc325.5 (23.0)25.1 (22.7)25.1 (22.7)25.0 (22.4)24.6 (22.0)23.9 (21.5)
16.6 SPSSinc425.5 (23.0)25.4 (22.9)25.3 (22.8)25.1 (22.6)24.7 (22.0)24.0 (21.5)
20 SPSFIR24.6 (22.0)24.5 (21.9)24.3 (21.8)24.2 (21.6)23.9 (21.2)23.1 (20.7)
20 SPSSinc124.8 (22.4)24.7 (22.1)24.6 (22.1)24.4 (22.0)24.1 (21.5)23.3 (20.9)
20 SPSSinc225.1 (22.6)24.9 (22.5)24.9 (22.5)24.7 (22.2)24.3 (21.8)23.6 (21.2)
20 SPSSinc325.3 (22.8)25.1 (22.6)25.0 (22.4)24.9 (22.4)24.5 (22.0)23.7 (21.3)
20 SPSSinc425.4 (22.9)25.2 (22.8)25.1 (22.7)25.0 (22.4)24.6 (22.1)23.9 (21.4)
50 SPSSinc124.2 (21.7)24.0 (21.4)23.9 (21.2)23.8 (21.2)23.5 (20.7)22.6 (20.0)
50 SPSSinc224.5 (22.0)24.3 (21.8)24.3 (21.7)24.0 (21.5)23.7 (21.0)23.0 (20.4)
50 SPSSinc324.6 (22.0)24.4 (21.8)24.3 (21.8)24.2 (21.5)23.9 (21.2)23.1 (20.6)
50 SPSSinc424.7 (22.0)24.6 (22.0)24.4 (21.8)24.3 (21.7)24.0 (21.3)23.2 (20.6)
60 SPSSinc124.1 (21.4)23.9 (21.3)23.8 (21.2)23.6 (21.0)23.4 (20.6)22.5 (20.0)
60 SPSSinc224.4 (21.8)24.2 (21.6)24.1 (21.5)24.0 (21.3)23.6 (20.9)22.9 (20.3)
60 SPSSinc324.5 (21.8)24.3 (21.8)24.2 (21.7)24.0 (21.4)23.7 (20.9)23.0 (20.4)
60 SPSSinc424.6 (22.1)24.4 (21.8)24.3 (21.8)24.1 (21.6)23.8 (21.1)23.1 (20.5)
100 SPSSinc123.7 (21.0)23.5 (20.9)23.5 (20.8)23.3 (20.6)23.0 (20.1)22.2 (19.5)
100 SPSSinc224.0 (21.4)23.8 (21.1)23.8 (21.0)23.6 (20.9)23.2 (20.5)22.4 (19.7)
100 SPSSinc324.2 (21.5)23.9 (21.2)23.9 (21.2)23.7 (20.9)23.4 (20.6)22.6 (19.9)
100 SPSSinc424.2 (21.5)24.0 (21.4)24.0 (21.3)23.8 (21.1)23.5 (20.7)22.7 (20.0)
400 SPSSinc122.7 (19.9)22.5 (19.6)22.5 (19.7)22.3 (19.5)22.0 (19.0)21.2 (18.3)
400 SPSSinc223.0 (20.2)22.8 (20.0)22.7 (19.9)22.6 (19.7)22.2 (19.2)21.5 (18.6)
400 SPSSinc323.2 (20.3)22.9 (20.1)22.9 (20.1)22.7 (19.9)22.4 (19.4)21.6 (18.7)
400 SPSSinc423.3 (20.4)23.0 (20.2)23.0 (20.1)22.8 (20.0)22.5 (19.6)21.7 (18.8)
1200 SPSSinc122.0 (19.1)21.7 (18.9)21.7 (18.7)21.5 (18.6)21.2 (18.2)20.4 (17.5)
1200 SPSSinc222.2 (19.3)22.0 (19.0)21.9 (19.0)21.8 (18.9)21.5 (18.4)20.7 (17.7)
1200 SPSSinc322.4 (19.4)22.1 (19.2)22.1 (19.1)21.9 (19.0)21.6 (18.6)20.8 (17.9)
1200 SPSSinc422.5 (19.5)22.2 (19.3)22.2 (19.3)22.0 (19.1)21.7 (18.6)20.9 (18.0)
2400 SPSSinc121.5 (18.5)21.3 (18.3)21.2 (18.3)21.0 (18.1)20.7 (17.7)20.0 (17.0)
2400 SPSSinc221.7 (18.8)21.5 (18.6)21.4 (18.5)21.3 (18.3)21.0 (18.0)20.2 (17.3)
2400 SPSSinc321.8 (18.9)21.7 (18.8)21.6 (18.6)21.4 (18.5)21.1 (18.1)20.3 (17.5)
2400 SPSSinc421.9 (19.0)21.7 (18.8)21.7 (18.8)21.5 (18.5)21.2 (18.2)20.4 (17.4)
4800 SPSSinc121.1 (18.2)20.8 (18.0)20.8 (17.9)20.6 (17.7)20.3 (17.4)19.5 (16.5)
4800 SPSSinc221.2 (18.3)21.0 (18.1)21.0 (18.0)20.8 (17.8)20.5 (17.5)19.7 (16.8)
4800 SPSSinc321.4 (18.4)21.1 (18.2)21.1 (18.1)20.9 (18.0)20.6 (17.5)19.8 (16.9)
4800 SPSSinc421.4 (18.5)21.2 (18.3)21.2 (18.2)21.0 (18.1)20.7 (17.7)19.9 (16.9)
7200 SPSSinc120.8 (17.9)20.6 (17.8)20.6 (17.6)20.4 (17.5)20.1 (17.1)19.4 (16.4)
7200 SPSSinc221.0 (18.1)20.8 (17.8)20.7 (17.8)20.5 (17.6)20.2 (17.2)19.5 (16.6)
7200 SPSSinc321.1 (18.1)20.9 (17.9)20.8 (17.9)20.6 (17.7)20.3 (17.2)19.5 (16.7)
7200 SPSSinc421.1 (18.2)20.9 (17.9)20.9 (17.9)20.7 (17.7)20.4 (17.4)19.6 (16.8)
14400 SPSSinc520.6 (17.7)20.4 (17.4)20.3 (17.4)20.2 (17.2)19.9 (16.9)19.2 (16.3)
19200 SPSSinc520.1 (17.2)19.9 (17.0)19.9 (17.0)19.8 (16.8)19.6 (16.6)18.9 (16.0)
38400 SPSSinc515.6 (12.6)15.4 (12.6)15.4 (12.5)15.3 (12.5)15.5 (12.6)15.4 (12.5)
Table 8-3 ADC2 (ADS1263) Noise in µVRMS (µVPP) at TA = 25°C, VAVDD = 5 V, VAVSS = 0 V, VREF = 2.5 V
DATA RATE FILTER GAIN
1 2 4 8 16 32 64 128
10 SPSSinc17.34 (32.6)3.54 (16.5)1.52 (7.57)0.87 (4.22)0.47 (2.42)0.28 (1.43)0.20 (1.08)0.14 (0.70)
100 SPSSinc310.3 (65.2)5.58 (36.0)3.13 (20.4)1.80 (11.5)0.96 (6.30)0.62 (4.03)0.48 (3.08)0.32 (2.04)
400 SPSSinc356.8 (827)29.2 (345)15.3 (158)7.88 (76.9)4.02 (36.2)2.18 (17.9)1.32 (9.94)0.80 (5.56)
800 SPSSinc3299 (3195)151 (1756)76.8 (875)38.9 (417)19.8 (199)10.0 (90.0)5.21 (43.6)2.71 (21.9)
Table 8-4 ADC2 (ADS1263) ENOB (Noise Free Bits) at TA = 25°C, VAVDD = 5 V, VAVSS = 0 V, VREF = 5 V
DATA RATE FILTER GAIN
1 2 4 8 16 32 64 128
10 SPSSinc121.4 (18.8)21.3 (18.8)21.1 (18.6)20.6 (18.2)20.6 (18.1)20.2 (17.8)19.4 (17.0)19.1 (16.7)
100 SPSSinc320.3 (17.5)20.1 (17.3)19.8 (17.2)19.4 (16.7)19.3 (16.5)18.9 (16.2)18.2 (15.6)17.8 (15.0)
400 SPSSinc316.5 (12.5)16.5 (12.5)16.4 (12.7)16.2 (12.8)16.2 (12.6)16.2 (13.0)16.1 (13.0)15.9 (13.0)
800 SPSSinc314.0 (10.7)14.0 (10.7)14.0 (10.4)13.8 (10.4)13.8 (10.4)13.8 (10.4)13.7 (10.6)13.7 (10.7)