SBASA22A september 2022 – july 2023 ADS131B26-Q1
PRODUCTION DATA
ADC1y uses a second-order delta-sigma (ΔΣ) modulator to convert the analog input signal to a 1's density modulated digital bit-stream. The ΔΣ modulator oversamples the input signal at a frequency many times greater than the output data rate. The modulator frequency, fMOD, of ADC1y is equal to half the main clock frequency (that is, fMOD = fMCLK / 2).