SBAS876C August 2018 – June 2019 ADS9224R , ADS9234R
PRODUCTION DATA.
Table 10 lists the ADS92x4R registers. All register offset addresses not listed in Table 10 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0h | DEVICE_STATUS | Device status register | DEVICE_STATUS Register (Offset = 0h) [reset = 0h] |
1h | POWER_DOWN_CFG | Power down configuration register | POWER_DOWN_CFG Register (Offset = 1h) [reset = 0h] |
2h | PROTOCOL_CFG | Protocol configuration register | PROTOCOL_CFG Register (Offset = 2h) [reset = 0h] |
3h | BUS_WIDTH | Bus width configuration register | BUS_WIDTH Register (Offset = 3h) [reset = 0h] |
4h | CRT_CFG | Clock re-timer configuration register | CRT_CFG Register (Offset = 4h) [reset = 0h] |
5h | OUTPUT_DATA_WORD_CFG | Output data word configuration register | OUTPUT_DATA_WORD_CFG Register (Offset = 5h) [reset = 0h] |
6h | DATA_AVG_CFG | Data averaging configuration register | DATA_AVG_CFG Register (Offset = 6h) [reset = 0h] |
7h | REFBY2_OFFSET | REFby2 offset selection register | REFBY2_OFFSET Register (Offset = 7h) [reset = 0h] |
Complex bit access types are encoded to fit into small table cells. Table 11 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value | |
Register Array Variables | ||
i,j,k,l,m,n | When these variables are used in a register name, an offset, or an address, they refer to the value of a register array where the register is part of a group of repeating registers. The register groups form a hierarchical structure and the array is represented with a formula. | |
y | When this variable is used in a register name, an offset, or an address it refers to the value of a register array. |