SLASF77A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
The ALARM pin is a global alarm indicator. ALARM is an open-drain pin, as Figure 7-15 illustrates; an external pullup resistor is required. When the pin is activated, the pin goes low. When the pin is inactive, the pin is in Hi-Z status. The ALARM pin functions as an interrupt to the host so that this pin can query the status register to determine the alarm source. Any alarm event (including analog inputs, temperatures, diode status, and device thermal condition) activates the pin if the alarm is not masked (the corresponding EALR bit in the alarm control register is 1). When the alarm pin is masked (EN-ALARM bit is 0), the occurrence of the event sets the corresponding status bit in status register to 1, but does not activate the ALARM pin.
When the ALARM-LATCH-DIS bit in the alarm control register is cleared (0), the alarm is latched. Reading the status register clears the alarm status bit. Whenever an alarm status bit is set, indicating an alarm condition, the bit remains set until the event that caused the alarm is resolved and the status register is read. The alarm bit can only be cleared by reading the status register after the event is resolved, or by a hardware reset, software reset, or power-on reset (POR). All bits are cleared when reading the status register, and all bits are reasserted if the out-of-limit condition still exists after the next conversion cycle, unless otherwise noted. When the ALARM-LATCH-DIS bit in the alarm control register is set (1), the ALARM pin is not latched. The alarm bit clears to 0 when the error condition subsides, regardless of whether the bit is read or not.