SLASF77A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
After power-on, the DAC output buffer is in power-down mode. The output buffer is in a Hi-Z state and the DACx-OUT (where x = 0 to 11) output pin connects to the analog ground through an internal 10-kΩ resistor. After power-on or a hardware reset, all DAC-n-data registers, DAC-n latches, and the DAC output are set to default values (000h).