SLASF77A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
There are 12 double-buffered DAC data registers. Each DAC has an internal latch preceded by a DAC data register. Data are initially written to an individual DAC-n-data register and then transferred to the corresponding DAC-n latch. When the DAC-n latch is updated, the output of DAC-n changes to the newly set value. When the host reads the register memory map location labeled DAC-n-data, the value held in the DAC-n latch is returned (not the value held in the input DAC-n-data register).