SLASF77A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | PADC | PREF | PDAC0 | PDAC1 | PDAC2 | PDAC3 | PDAC4 | PDAC5 | PDAC6 | PDAC7 | PDAC8 | PDAC9 | PDAC10 | PDAC11 | Reserved |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
14 | PADC | RW | 0 | Power-down mode control bit. 0: The ADC is inactive in low-power mode. 1: The ADC is in normal operating mode. |
13 | PREF | R/W | 0 | Internal reference in power-down mode control bit. 0: The reference buffer amplifier is inactive in low-power mode. 1: The reference buffer amplifier is powered on. |
12-1 | PDAC0 to PDAC11 | R/W | 0 | DACn power-down control bit. 0: DACn is inactive in low-power mode and the output buffer amplifier is in a Hi-Z state. The output pin of DACn is internally switched from the buffer output to the analog ground through an internal resistor. 1: DACn is in normal operating mode. |