Figure 7-24 and Figure 7-25 illustrate the process for this protocol. Steps for this protocol are:
- The controller device asserts a start condition.
- The controller then sends the 7-bit device target address followed by a 0 for
the direction bit, indicating a write operation.
- The device asserts an acknowledge signal on SDA.
- The controller sends a register address.
- The device asserts an acknowledge signal on SDA.
- The controller device asserts a restart condition.
- The controller then sends the 7-bit device target address followed by a 1 for
the direction bit, indicating a read operation.
- The device asserts an acknowledge signal on SDA.
- The device then sends the high byte of the register (D[15:8]).
- The controller asserts an acknowledge signal on SDA.
- The device sends the low byte of the register (D[7:0]).
- The controller asserts an acknowledge signal on SDA.
- The device and the controller repeat steps 9 to 12 until the low byte of last
reading is transferred.
- After receiving the low byte of the last register, the controller asserts a not
acknowledge signal on SDA.
- The controller then asserts a stop condition to end the transaction.