SLASF77A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
As noted previously, the device continuously monitors all analog inputs and temperatures in normal operation. When any input is out of the specified range in N consecutive conversions, the corresponding alarm bit is set (1). If the input returns to the normal range before N consecutive times, the alarm bit remains clear (0). This design avoids false alarms.
The number N is programmable by the CH-FALR-CT-[2:0] bits in AFE configuration register 1 for analog input CHn as shown in Table 7-5, or by the TEMP-FALR-CT-[1:0] bits for temperature monitors as shown in Table 7-6.
CH-FALR-CT-2 | CH-FALR-CT-1 | CH-FALR-CT-0 | N CONSECUTIVE SAMPLES BEFORE ALARM IS SET |
---|---|---|---|
0 | 0 | 0 | 1 |
0 | 0 | 1 | 4 |
0 | 1 | 0 | 8 |
0 | 1 | 1 | 16 (default) |
1 | 0 | 0 | 32 |
1 | 0 | 1 | 64 |
1 | 1 | 0 | 128 |
1 | 1 | 1 | 256 |
TEMP-FALR-CT-1 | TEMP-FALR-CT-0 | N CONSECUTIVE SAMPLES BEFORE ALARM IS SET |
---|---|---|
0 | 0 | 1 |
0 | 1 | 2 |
1 | 0 | 4 (default) |
1 | 1 | 8 |