A complete word must be written to a register (high byte and low byte) for proper operation, as shown in Figure 7-22. Steps for this process are:
- The controller device asserts a start condition.
- The controller then sends the 7-bit device target address followed by a 0 for
the direction bit, indicating a write operation.
- The device asserts an acknowledge signal on SDA.
- The controller sends the first register address.
- The device asserts an acknowledge signal on SDA.
- The controller sends the high byte of the data word to the first register.
- The device asserts an acknowledge signal on SDA.
- The controller sends the low byte of the data word to the first register.
- The device asserts an acknowledge signal on SDA.
- The controller sends a second register address.
- The device asserts an acknowledge signal on SDA.
- The controller then sends the high byte of the data word to the second
register.
- The device asserts an acknowledge on SDA.
- The controller sends the low byte of the data word to the second register.
- The device asserts an acknowledge signal on SDA.
- The controller and the device repeat steps 4 to 15 until the last data are
transferred.
- The controller then asserts a stop condition to end the transaction.