SPRSPA7A September   2024  – November 2024 AM2612

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
    1. 3.1 Functional Block Diagram
  5. Package Comparison
    1. 4.1 Related Products
  6. Terminal Configuration and Functions
    1. 5.1 Pin Diagram
      1. 5.1.1 AM261x ZCZ Pin Diagram
      2. 5.1.2 AM261x ZFG Pin Diagram
      3. 5.1.3 AM261x ZEJ Pin Diagram
      4. 5.1.4 AM261x ZNC Pin Diagram
    2. 5.2 Pin Attributes
      1.      15
      2.      16
    3. 5.3 Signal Descriptions
      1.      18
      2. 5.3.1  ADC
        1.       20
        2.       21
        3.       22
      3. 5.3.2  ADC_CAL
        1.       24
      4. 5.3.3  ADC VREF
        1.       26
      5. 5.3.4  CPSW
        1.       28
        2.       29
        3.       30
        4.       31
        5.       32
        6.       33
        7.       34
      6. 5.3.5  CPTS
        1.       36
      7. 5.3.6  DAC
        1.       38
      8. 5.3.7  EPWM
        1.       40
        2.       41
        3.       42
        4.       43
        5.       44
        6.       45
        7.       46
        8.       47
        9.       48
        10.       49
      9. 5.3.8  EQEP
        1.       51
        2.       52
      10. 5.3.9  FSI
        1.       54
        2.       55
      11. 5.3.10 GPIO
        1.       57
      12. 5.3.11 GPMC0
        1.       59
      13. 5.3.12 I2C
        1.       61
        2.       62
        3.       63
      14. 5.3.13 LIN
        1.       65
        2.       66
        3.       67
      15. 5.3.14 MCAN
        1.       69
        2.       70
      16. 5.3.15 SPI (MCSPI)
        1.       72
        2.       73
        3.       74
        4.       75
      17. 5.3.16 MMC
        1.       77
      18. 5.3.17 Power Supply
        1.       79
      19. 5.3.18 PRU-ICSS
        1.       81
        2.       82
        3.       83
        4.       84
        5.       85
      20. 5.3.19 OSPI
        1.       87
        2.       88
      21. 5.3.20 SDFM
        1.       90
        2.       91
      22. 5.3.21 System and Miscellaneous
        1. 5.3.21.1 Boot Mode Configuration
          1.        94
        2. 5.3.21.2 Clocking
          1.        96
          2.        97
          3.        98
        3. 5.3.21.3 Emulation and Debug
          1.        100
          2.        101
        4. 5.3.21.4 SYSTEM
          1.        103
        5. 5.3.21.5 USB0
          1.        105
        6. 5.3.21.6 VMON
          1.        107
        7.       108
          1.        109
      23. 5.3.22 UART
        1.       111
        2.       112
        3.       113
        4.       114
        5.       115
        6.       116
      24. 5.3.23 XBAR
        1.       118
        2.       119
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Electrical Characteristics
      1. 6.3.1 Digital and Analog IO Electrical Characteristics
    4. 6.4 Thermal Resistance Characteristics
      1. 6.4.1 Package Thermal Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Processor Subsystems
      1. 7.2.1 Arm Cortex-R5F Subsystem
  9. Applications, Implementation, and Layout
    1. 8.1 Device Connection and Layout Fundamentals
      1. 8.1.1 External Oscillator
      2. 8.1.2 JTAG, EMU, and TRACE
      3. 8.1.3 Hardware Reference Design and Guidelines
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
      1. 9.1.1 Device Naming Convention
    2. 9.2 Tools and Software
    3. 9.3 Documentation Support
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • ZFG|304
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 5-51 OSPI0 Signal Descriptions
Signal Name [1]Pin Type [2]Description [3]ZCZ PIN [4]ZFG PIN [4]ZEJ PIN [4]ZNC PIN [4]
OSPI0_CLKOOSPI0 ClockH2, K1, L2, N2H1, M3, N1, N2E1, J2, K2, L2F1, J2, K1, M2
OSPI0_DQSIOSPI0 Data Strobe (DQS) or Loopback Clock inputL2, M1, M3N2, P1, R4J3, K2, L1J2, K2, M1
OSPI0_ECC_FAILIOSPI0 ECC Failure Status PinA9, B10, H1, K3, M2A11, D10, J3, M1, M2A9, C10, G1, H1A11, J1, J3
OSPI0_LBCLKOOOSPI0 Loopback Clock outputL3T3M1L2
OSPI0_CSn0OOSPI0 Chip Select 0H1, J2, P1J3, L2, U4F3, N3G1, R1
OSPI0_CSn1OOSPI0 Chip Select 1F4, R3G2, T2D2, M3D2, R2
OSPI0_D0IOOSPI0 Data bit 0 (SOP0)G3, N1, N2, P1H2, M3, R2, U4E2, L2, M2, N3E1, M2, N2, R1
OSPI0_D1IOOSPI0 Data bit 1 (SOP1)F1, J1, K3, N4G1, K2, M2, R1D1, G1, G3, N1D1, J1, N1
OSPI0_D2IOOSPI0 Data bit 2L1, M1, M4P1, P2, T1J3, K1, L3K2, L1, P2
OSPI0_D3IOOSPI0 Data bit 3K4, P3L1, U1H2, N2H2, P1
OSPI0_D4IOOSPI0 Data bit 4M1, M3, P3P1, R4, U1J3, L1, N2K2, M1, P1
OSPI0_D5IOOSPI0 Data bit 5K2, L1K1, P2G2, K1G2, L1
OSPI0_D6IOOSPI0 Data bit 6L1, L2, M4N2, P2, T1K1, K2, L3J2, L1, P2
OSPI0_D7IOOSPI0 Data bit 7J4, K1L4, N1H3, J2H1, K1
OSPI0_RESET_OUT0OOSPI0 Reset Out 0B9, D9, G1, G2, J1, J3B11, C9, E1, J1, K2, K4C11, D3, D8, F2, G3B10, C1, F2
OSPI0_RESET_OUT1OOSPI0 Reset Out 1A9, B8, H1A11, B10, J3B8, C10A10, A11