6.10.7 QSPI
The quad serial peripheral interface (QSPI™) module is a kind of SPI module that allows single, dual, or quad read access to external SPI devices. This module has a memory mapped register interface, which provides a direct interface for accessing data from external SPI devices and thus simplifying software requirements. The QSPI works as a master only.
The QSPI supports the following features:
- General SPI features:
- Programmable clock divider
- Six pin interface
- Programmable length (from 1 to 128 bits) of the words transferred
- Programmable number (from 1 to 4096) of the words transferred
- 4 external chip-select signals
- Support for 3-, 4-, or 6-pin SPI interface
- Optional interrupt generation on word or frame (number of words) completion
- Programmable delay between chip select activation and output data from 0 to 3 QSPI clock cycles
- Programmable signal polarities
- Programmable active clock edge
- Software-controllable interface allowing for any type of SPI transfer
- Control through L3_MAIN configuration port
- Serial flash interface (SFI) features:
- Serial flash read/write interface
- Additional registers for defining read and write commands to the external serial flash device
- 1 to 4 address bytes
- Fast read support, where fast read requires dummy bytes after address bytes; 0 to 3 dummy bytes can be configured.
- Dual read support
- Quad read support
- Little-endian support only
- Linear increment addressing mode only
The QSPI supports only dual and quad reads. Dual or quad writes are not supported. In addition, there is no "pass through" mode supported where the data present on the QSPI input is sent to its output.
For more information, see section Quad Serial Peripheral Interface (QSPI) in chapter Serial Communication Interfaces of the Device TRM.