SPRSP52C December   2019  – September 2023 AM6526 , AM6528 , AM6546 , AM6548

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
    1. 3.1 Functional Block Diagram
  5. Device Comparison
    1. 4.1 Related Products
  6. Terminal Configuration and Functions
    1. 5.1 Pin Diagram
    2. 5.2 Pin Attributes
    3. 5.3 Signal Descriptions
      1. 5.3.1  ADC
        1. 5.3.1.1 MCU Domain
      2. 5.3.2  CAL
        1. 5.3.2.1 MAIN Domain
      3. 5.3.3  CPSW2G
        1. 5.3.3.1 MCU Domain
      4. 5.3.4  DDRSS
        1. 5.3.4.1 MAIN Domain
        2. 5.3.4.2 DDRSS Mapping
      5. 5.3.5  DMTIMER
        1. 5.3.5.1 MAIN Domain
        2. 5.3.5.2 MCU Domain
      6. 5.3.6  DSS
        1. 5.3.6.1 MAIN Domain
      7. 5.3.7  ECAP
        1. 5.3.7.1 MAIN Domain
      8. 5.3.8  EHRPWM
        1. 5.3.8.1 MAIN Domain
      9. 5.3.9  EQEP
        1. 5.3.9.1 MAIN Domain
      10. 5.3.10 GPIO
        1. 5.3.10.1 MAIN Domain
        2. 5.3.10.2 WKUP Domain
      11. 5.3.11 GPMC
        1. 5.3.11.1 MAIN Domain
      12. 5.3.12 HyperBus
        1. 5.3.12.1 MCU Domain
      13. 5.3.13 I2C
        1. 5.3.13.1 MAIN Domain
        2. 5.3.13.2 MCU Domain
        3. 5.3.13.3 WKUP Domain
      14. 5.3.14 MCAN
        1. 5.3.14.1 MCU Domain
      15. 5.3.15 MCASP
        1. 5.3.15.1 MAIN Domain
      16. 5.3.16 MCSPI
        1. 5.3.16.1 MAIN Domain
        2. 5.3.16.2 MCU Domain
      17. 5.3.17 MMCSD
        1. 5.3.17.1 MAIN Domain
      18. 5.3.18 CPTS
        1. 5.3.18.1 MCU Domain
        2. 5.3.18.2 MAIN Domain
      19. 5.3.19 OLDI
        1. 5.3.19.1 MAIN Domain
      20. 5.3.20 OSPI
        1. 5.3.20.1 MCU Domain
      21. 5.3.21 PRU_ICSSG
        1. 5.3.21.1 MAIN Domain
      22. 5.3.22 SERDES
        1. 5.3.22.1 MAIN Domain
      23. 5.3.23 UART
        1. 5.3.23.1 MAIN Domain
        2. 5.3.23.2 MCU Domain
        3. 5.3.23.3 WKUP Domain
      24. 5.3.24 USB
        1. 5.3.24.1 MAIN Domain
      25. 5.3.25 Emulation and Debug
        1. 5.3.25.1 MAIN Domain
      26. 5.3.26 System and Miscellaneous
        1. 5.3.26.1 Boot Mode Configuration
          1. 5.3.26.1.1 MAIN Domain
          2. 5.3.26.1.2 MCU Domain
        2. 5.3.26.2 Clock
          1. 5.3.26.2.1 MAIN Domain
          2. 5.3.26.2.2 WKUP Domain
        3. 5.3.26.3 System
          1. 5.3.26.3.1 MAIN Domain
          2. 5.3.26.3.2 WKUP Domain
        4. 5.3.26.4 Miscellaneous
          1. 5.3.26.4.1 WKUP Domain
        5. 5.3.26.5 EFUSE
          1. 5.3.26.5.1 MAIN Domain
          2. 5.3.26.5.2 MCU Domain
      27. 5.3.27 Power Supply
    4. 5.4 Pin Multiplexing
    5. 5.5 Connections for Unused Pins
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Power-On Hours (POH)
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Operating Performance Points
      1. 6.5.1 Voltage and Core Clock Specifications
    6. 6.6 Electrical Characteristics
      1. 6.6.1 I2C OPEN DRAIN DC Electrical Characteristics
      2. 6.6.2 Analog OSC Buffers DC Electrical Characteristics
      3. 6.6.3 Analog ADC DC Electrical Characteristics
      4. 6.6.4 DPHY CSI2 Buffers DC Electrical Characteristics
      5. 6.6.5 OLDI LVDS Buffers DC Electrical Characteristics
        1. 6.6.5.1 LVCMOS Buffers DC Electrical Characteristics
      6. 6.6.6 USBHS Buffers DC Electrical Characteristics
      7. 6.6.7 SERDES Buffers DC Electrical Characteristics
    7. 6.7 VPP Specifications for One-Time Programmable (OTP) eFuses
      1. 6.7.1 Recommended Operating Conditions for OTP eFuse Programming
      2. 6.7.2 Hardware Requirements
      3. 6.7.3 Programming Sequence
      4. 6.7.4 Impact to Your Hardware Warranty
    8. 6.8 Thermal Resistance Characteristics
      1. 6.8.1 Thermal Resistance Characteristics
    9. 6.9 Timing and Switching Characteristics
      1. 6.9.1 Timing Parameters and Information
      2. 6.9.2 Power Supply Sequencing
        1. 6.9.2.1 Power Supply Slew Rate Requirement
        2. 6.9.2.2 VDDA_1P8_SERDES0 Supply Slew Rate Requirement
        3. 6.9.2.3 Power-Up Sequencing
        4. 6.9.2.4 Power-Down Sequencing
      3. 6.9.3 System Timing
        1. 6.9.3.1 Reset Electrical Data/Timing
        2. 6.9.3.2 Safety Signal Timing
        3. 6.9.3.3 Clock Timing
      4. 6.9.4 Clock Specifications
        1. 6.9.4.1 Input Clocks / Oscillators
          1. 6.9.4.1.1 WKUP_OSC0 Internal Oscillator Clock Source
          2. 6.9.4.1.2 WKUP_OSC0 LVCMOS Digital Clock Source
          3. 6.9.4.1.3 Auxiliary OSC1 Internal Oscillator Clock Source
          4. 6.9.4.1.4 Auxiliary OSC1 LVCMOS Digital Clock Source
          5. 6.9.4.1.5 Auxiliary OSC1 Not Used
          6. 6.9.4.1.6 WKUP_LFOSC0 Internal Oscillator Clock Source
          7. 6.9.4.1.7 WKUP_LFOSC0 LVCMOS Digital Clock Source
          8. 6.9.4.1.8 WKUP_LFOSC0 Not Used
        2. 6.9.4.2 Output Clocks
        3. 6.9.4.3 PLLs
        4. 6.9.4.4 Recommended Clock and Control Signal Transition Behavior
        5. 6.9.4.5 Module and Peripheral Clock Frequencies
      5. 6.9.5 Peripherals
        1. 6.9.5.1  VIN
        2. 6.9.5.2  CPSW2G
          1. 6.9.5.2.1 CPSW2G MDIO Interface Timings
          2. 6.9.5.2.2 CPSW2G RMII Timings
            1. 6.9.5.2.2.1 Timing Requirements for RMII[x]_REFCLK - RMII Mode
            2. 6.9.5.2.2.2 Timing Requirements for RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RXER - RMII Mode
            3. 6.9.5.2.2.3 Switching Characteristics for RMII[x]_TXD[1:0], and RMII[x]_TXEN - RMII Mode
          3. 6.9.5.2.3 CPSW2G RGMII Timings
            1. 6.9.5.2.3.1 Timing Requirements for RGMII[x]_RCLK - RGMII Mode
            2. 6.9.5.2.3.2 Timing Requirements for RGMII[x]_RD[3:0], and RGMII[x]_RCTL - RGMII Mode
            3. 6.9.5.2.3.3 Switching Characteristics for RGMII[x]_TCLK - RGMII Mode
            4. 6.9.5.2.3.4 Switching Characteristics for RGMII[x]_TD[3:0], and RGMII[x]_TX_CTL - RGMII Mode
        3. 6.9.5.3  CSI2
        4. 6.9.5.4  DDRSS
        5. 6.9.5.5  DSS
        6. 6.9.5.6  eCAP
          1. 6.9.5.6.1 eCAP Timing Requirements
          2. 6.9.5.6.2 eCAP Switching Characteristics
        7. 6.9.5.7  ePWM
          1. 6.9.5.7.1 ePWM Timing Requirements
          2. 6.9.5.7.2 ePWM Switching Characteristics
        8. 6.9.5.8  eQEP
          1. 6.9.5.8.1 eQEP Timing Requirements
          2. 6.9.5.8.2 eQEP Switching Characteristics
        9. 6.9.5.9  GPIO
          1. 6.9.5.9.1 GPIO Timing Requirements
          2. 6.9.5.9.2 GPIO Switching Characteristics
        10. 6.9.5.10 GPMC
          1. 6.9.5.10.1 GPMC and NOR Flash—Synchronous Mode
            1. 6.9.5.10.1.1 GPMC and NOR Flash Timing Requirements—Synchronous Mode
            2. 6.9.5.10.1.2 GPMC and NOR Flash Switching Characteristics—Synchronous Mode
          2. 6.9.5.10.2 GPMC and NOR Flash—Asynchronous Mode
            1. 6.9.5.10.2.1 GPMC and NOR Flash Timing Requirements—Asynchronous Mode
            2. 6.9.5.10.2.2 GPMC and NOR Flash Switching Characteristics—Asynchronous Mode
          3. 6.9.5.10.3 GPMC and NAND Flash—Asynchronous Mode
            1. 6.9.5.10.3.1 GPMC and NAND Flash Timing Requirements—Asynchronous Mode
            2. 6.9.5.10.3.2 GPMC and NAND Flash Switching Characteristics—Asynchronous Mode
        11. 6.9.5.11 HyperBus
          1. 6.9.5.11.1 Timing Requirements for HyperBus Initialization
          2. 6.9.5.11.2 HyperBus 166 MHz Switching Characteristics
          3. 6.9.5.11.3 HyperBus 100 MHz Switching Characteristics
        12. 6.9.5.12 I2C
        13. 6.9.5.13 MCAN
        14. 6.9.5.14 MCASP
          1. 6.9.5.14.1 MCASP Timing Requirements and Switching Characteristics
        15. 6.9.5.15 MCSPI
          1. 6.9.5.15.1 SPI—Master Mode
          2. 6.9.5.15.2 SPI—Slave Mode
        16. 6.9.5.16 MMCSD
          1. 6.9.5.16.1 MMCSDi — eMMC/SD/SDIO Card Interface
            1. 6.9.5.16.1.1 Default Speed, 3.3V Legacy SDR Mode
            2. 6.9.5.16.1.2 High Speed, 3.3V High Speed SDR Mode
            3. 6.9.5.16.1.3 UHS-I SDR12, 1.8-V Legacy SDR Mode
            4. 6.9.5.16.1.4 UHS-I SDR25 Mode
            5. 6.9.5.16.1.5 UHS-I DDR50 Mode
            6. 6.9.5.16.1.6 UHS-I SDR50 Mode
            7. 6.9.5.16.1.7 UHS-I SDR104 / HS200 Mode
        17. 6.9.5.17 CPTS
          1. 6.9.5.17.1 CPTS Timing Requirements
          2. 6.9.5.17.2 CPTS Switching Characteristics
        18. 6.9.5.18 OSPI
          1. 6.9.5.18.1 OSPI with Data Training
            1. 6.9.5.18.1.1 OSPI Switching Characteristics - Data Training
          2. 6.9.5.18.2 OSPI without Data Training
            1. 6.9.5.18.2.1 OSPI Timing Requirements - SDR Mode
            2. 6.9.5.18.2.2 OSPI Switching Characteristics - SDR Mode
            3. 6.9.5.18.2.3 OSPI Timing Requirements - DDR Mode
            4. 6.9.5.18.2.4 OSPI Switching Characteristics - DDR Mode
        19. 6.9.5.19 OLDI
          1. 6.9.5.19.1 OLDI Switching Characteristics
        20. 6.9.5.20 PCIE
        21. 6.9.5.21 PRU_ICSSG
          1. 6.9.5.21.1 Programmable Real-Time Unit (PRU_ICSSG PRU)
            1. 6.9.5.21.1.1 PRU_ICSSG PRU Direct Input/Output Mode Electrical Data and Timing
              1. 6.9.5.21.1.1.1 PRU_ICSSG PRU Switching Characteristics - Direct Output Mode
            2. 6.9.5.21.1.2 PRU_ICSSG PRU Parallel Capture Mode Electrical Data and Timing
              1. 6.9.5.21.1.2.1 PRU_ICSSG PRU Timing Requirements - Parallel Capture Mode
            3. 6.9.5.21.1.3 PRU_ICSSG PRU Shift Mode Electrical Data and Timing
              1. 6.9.5.21.1.3.1 PRU_ICSSG PRU Timing Requirements - Shift In Mode
              2. 6.9.5.21.1.3.2 PRU_ICSSG PRU Switching Characteristics - Shift Out Mode
            4. 6.9.5.21.1.4 PRU_ICSSG PRU Sigma Delta and Peripheral Interface Modes Electrical Data and Timing
              1. 6.9.5.21.1.4.1 PRU_ICSSG PRU Timing Requirements - Sigma Delta Mode
              2. 6.9.5.21.1.4.2 PRU_ICSSG PRU Timing Requirements - Peripheral Interface Mode
              3. 6.9.5.21.1.4.3 PRU_ICSSG PRU Switching Characteristics - Peripheral Interface Mode
          2. 6.9.5.21.2 PRU_ICSSG Pulse Width Modulation (PWM)
            1. 6.9.5.21.2.1 PRU_ICSSG PWM Electrical Data and Timing
              1. 6.9.5.21.2.1.1 PRU_ICSSG PWM Switching Characteristics
          3. 6.9.5.21.3 PRU_ICSSG Industrial Ethernet Peripheral (PRU_ICSSG IEP)
            1. 6.9.5.21.3.1 PRU_ICSSG IEP Electrical Data and Timing
              1. 6.9.5.21.3.1.1 PRU_ICSSG IEP Timing Requirements - Input Validated with SYNCx
              2. 6.9.5.21.3.1.2 PRU_ICSSG IEP Timing Requirements - Digital IOs
              3. 6.9.5.21.3.1.3 PRU_ICSSG IEP Timing Requirements - LATCHx_IN
          4. 6.9.5.21.4 PRU_ICSSG Universal Asynchronous Receiver Transmitter (PRU-ICSS UART)
            1. 6.9.5.21.4.1 PRU_ICSSG UART Electrical Data and Timing
              1. 6.9.5.21.4.1.1 PRU_ICSSG UART Timing Requirements
              2. 6.9.5.21.4.1.2 PRU_ICSSG UART Switching Characteristics
          5. 6.9.5.21.5 PRU_ICSSG Enhanced Capture Peripheral (PRU-ICSS ECAP)
            1. 6.9.5.21.5.1 PRU_ICSSG ECAP Electrical Data and Timing
              1. 6.9.5.21.5.1.1 PRU_ICSSG ECAP Timing Requirements
              2. 6.9.5.21.5.1.2 PRU_ICSSG ECAP Switching Characteristics
          6. 6.9.5.21.6 PRU_ICSSG RGMII, MII_RT, and Switch
            1. 6.9.5.21.6.1 PRU_ICSSG MDIO Electrical Data and Timing
              1. 6.9.5.21.6.1.1 PRU_ICSSG MDIO Timing Requirements
              2. 6.9.5.21.6.1.2 PRU_ICSSG MDIO Switching Characteristics - MDIO_CLK
              3. 6.9.5.21.6.1.3 PRU_ICSSG MDIO Switching Characteristics – MDIO_DATA
            2. 6.9.5.21.6.2 PRU_ICSSG RGMII Electrical Data and Timing
              1. 6.9.5.21.6.2.1 PRU_ICSSG RGMII Timing Requirements - RGMII_RXC
              2. 6.9.5.21.6.2.2 PRU_ICSSG RGMII Timing Requirements - RGMII_RD[3:0] and RGMII_RX_CTL
              3. 6.9.5.21.6.2.3 PRU_ICSSG RGMII Switching Characteristics - RGMII_TXC
              4. 6.9.5.21.6.2.4 PRU_ICSSG RGMII Switching Characteristics - RGMII_TD[3:0] and RGMII_TX_CTL
            3. 6.9.5.21.6.3 PRU_ICSSG MII_RT Electrical Data and Timing
              1. 6.9.5.21.6.3.1 PRU_ICSSG MII_RT Timing Requirements – MII_RX_CLK
              2. 6.9.5.21.6.3.2 PRU_ICSSG MII_RT Timing Requirements – MII_RXD[3:0], MII_RX_DV, and MII_RX_ER
              3. 6.9.5.21.6.3.3 PRU_ICSSG MII_RT Switching Characteristics – MII_TX_CLK
              4. 6.9.5.21.6.3.4 PRU_ICSSG MII_RT Switching Characteristics – MII_TXD[3:0] and MII_TXEN
        22. 6.9.5.22 Timers
          1. 6.9.5.22.1 Timing Requirements for Timers
          2. 6.9.5.22.2 Switching Characteristics for Timers
        23. 6.9.5.23 UART
          1. 6.9.5.23.1 Timing Requirements for UART
          2. 6.9.5.23.2 Switching Characteristics Over Recommended Operating Conditions for UART
        24. 6.9.5.24 USB
        25. 6.9.5.25 Emulation and Debug
          1. 6.9.5.25.1 Debug Trace
          2. 6.9.5.25.2 JTAG
            1. 6.9.5.25.2.1 JTAG Electrical Data and Timing
              1. 6.9.5.25.2.1.1 JTAG Timing Requirements
              2. 6.9.5.25.2.1.2 JTAG Switching Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Processor Subsystems
      1. 7.2.1 Arm Cortex-A53
      2. 7.2.2 Arm Cortex-R5F
    3. 7.3 Accelerators and Coprocessors
      1. 7.3.1 PRU_ICSSG
        1. 7.3.1.1 PRU_ICSSG PRU and RTU_PRU Cores
        2. 7.3.1.2 PRU_ICSSG Broadside Accelerators Overview
        3. 7.3.1.3 PRU_ICSSG UART Module
        4. 7.3.1.4 PRU_ICSSG ECAP Module
        5. 7.3.1.5 PRU_ICSSG PWM Module
        6. 7.3.1.6 PRU_ICSSG MII_G_RT Module
        7. 7.3.1.7 PRU_ICSSG MII MDIO Module
        8. 7.3.1.8 PRU_ICSSG IEP
      2. 7.3.2 GPU
    4. 7.4 Other Subsystems
      1. 7.4.1 DMSC
      2. 7.4.2 MSMC
      3. 7.4.3 NAVSS
        1. 7.4.3.1 NAVSS0
        2. 7.4.3.2 MCU_NAVSS0
      4. 7.4.4 PDMA Controller
      5. 7.4.5 Peripherals
        1. 7.4.5.1  ADC
        2. 7.4.5.2  CAL
        3. 7.4.5.3  CPSW2G
        4. 7.4.5.4  DCC
        5. 7.4.5.5  DDRSS
        6. 7.4.5.6  DSS
        7. 7.4.5.7  ЕCAP
        8. 7.4.5.8  EPWM
        9. 7.4.5.9  ELM
        10. 7.4.5.10 ESM
        11. 7.4.5.11 EQEP
        12. 7.4.5.12 GPIO
        13. 7.4.5.13 GPMC
        14. 7.4.5.14 HyperBus
        15. 7.4.5.15 I2C
        16. 7.4.5.16 MCAN
        17. 7.4.5.17 MCASP
        18. 7.4.5.18 MCRC
        19. 7.4.5.19 MCSPI
        20. 7.4.5.20 MMCSD
        21. 7.4.5.21 OSPI
        22. 7.4.5.22 PCIE
        23. 7.4.5.23 SerDes
        24. 7.4.5.24 RTI
        25. 7.4.5.25 Timers
        26. 7.4.5.26 UART
        27. 7.4.5.27 USB
    5. 7.5 Identification
      1. 7.5.1 Revision Identification
      2. 7.5.2 Die Identification
      3. 7.5.3 JTAG Identification
      4. 7.5.4 ROM Code Identification
    6. 7.6 Boot Modes
  9. Applications, Implementation, and Layout
    1. 8.1 Device Connection and Layout Fundamentals
      1. 8.1.1 Power Supply Decoupling and Bulk Capacitors
        1. 8.1.1.1 Power Distribution Network Implementation Guidance
      2. 8.1.2 External Oscillator
      3. 8.1.3 JTAG and EMU
      4. 8.1.4 Reset
      5. 8.1.5 Unused Pins
      6. 8.1.6 Hardware Design Guide for AM65x/DRA80xM Devices
    2. 8.2 Peripheral- and Interface-Specific Design Information
      1. 8.2.1 DDR Board Design and Layout Guidelines
      2. 8.2.2 OSPI Board Design and Layout Guidelines
        1. 8.2.2.1 No Loopback and Internal Pad Loopback
        2. 8.2.2.2 External Board Loopback
        3. 8.2.2.3 DQS (Only Available in Octal Flash Devices)
      3. 8.2.3 USB Design Guidelines
      4. 8.2.4 High Speed Differential Signal Routing Guidance
      5. 8.2.5 System Power Supply Monitor Design Guidelines
      6. 8.2.6 MMC Design Guidelines
      7. 8.2.7 Integrated Power Management Features
      8. 8.2.8 External Capacitors
        1. 8.2.8.1 LVCMOS External Capacitor Connections
      9. 8.2.9 Thermal Solution Guidance
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
      1. 9.1.1 Standard Package Symbolization
      2. 9.1.2 Device Naming Convention
    2. 9.2 Tools and Software
    3. 9.3 Documentation Support
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ACD|784
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Attributes

Table 5-1 describes the terminal characteristics and the signals multiplexed on each ball.

Table 5-1 Pin Attributes
BALL NUMBER [1] BALL NAME [2] SIGNAL NAME [3] MUXMODE [4] TYPE [5] BALL RESET STATE [6] BALL RESET REL. MUXMODE [7] I/O VOLTAGE VALUE [8] POWER [9] HYS [10] BUFFER TYPE [11] PULL UP/DOWN TYPE [12] DSIS [13] RXACTIVE/TXDISABLE [14] IO Daisy Chain [15]
P17 CAP_VDDAR_CORE0 CAP_VDDAR_CORE0 CAP
V17 CAP_VDDAR_CORE1 CAP_VDDAR_CORE1 CAP
W16 CAP_VDDAR_CORE2 CAP_VDDAR_CORE2 CAP
M14 CAP_VDDAR_CORE3 CAP_VDDAR_CORE3 CAP
L15 CAP_VDDAR_CORE4 CAP_VDDAR_CORE4 CAP
U10 CAP_VDDAR_MCU CAP_VDDAR_MCU CAP
M12 CAP_VDDAR_MPU0_0 CAP_VDDAR_MPU0_0 CAP
N12 CAP_VDDAR_MPU0_1 CAP_VDDAR_MPU0_1 CAP
N18 CAP_VDDAR_MPU1_0 CAP_VDDAR_MPU1_0 CAP
N15 CAP_VDDAR_MPU1_1 CAP_VDDAR_MPU1_1 CAP
Y10 CAP_VDDAR_WKUP CAP_VDDAR_WKUP CAP
AA8 CAP_VDDA_1P8_IOLDO_WKUP CAP_VDDA_1P8_IOLDO_WKUP CAP
J17 CAP_VDDA_1P8_SDIO CAP_VDDA_1P8_SDIO CAP
G19 CAP_VDDA_1P8_IOLDO0 CAP_VDDA_1P8_IOLDO0 CAP
Y19 CAP_VDDA_1P8_IOLDO1 CAP_VDDA_1P8_IOLDO1 CAP
H18 CAP_VDDSHV_SDIO CAP_VDDSHV_SDIO CAP
V9 CAP_VDD_WKUP CAP_VDD_WKUP CAP
G28 CSI0_RXN0 CSI0_RXN0 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
H27 CSI0_RXN1 CSI0_RXN1 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
F26 CSI0_RXN2 CSI0_RXN2 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
H25 CSI0_RXN3 CSI0_RXN3 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
G24 CSI0_RXN4 CSI0_RXN4 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
F28 CSI0_RXP0 CSI0_RXP0 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
G27 CSI0_RXP1 CSI0_RXP1 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
G26 CSI0_RXP2 CSI0_RXP2 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
G25 CSI0_RXP3 CSI0_RXP3 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
F24 CSI0_RXP4 CSI0_RXP4 I PD 1.8 V VDDA_1P8_CSI0 DPHY PU/PD No
A10 DDR_AC0 DDR_AC0 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D9 DDR_AC1 DDR_AC1 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C9 DDR_AC2 DDR_AC2 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E9 DDR_AC3 DDR_AC3 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A9 DDR_AC4 DDR_AC4 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E8 DDR_AC5 DDR_AC5 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F8 DDR_AC6 DDR_AC6 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C7 DDR_AC7 DDR_AC7 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C8 DDR_AC8 DDR_AC8 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D7 DDR_AC9 DDR_AC9 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E7 DDR_AC10 DDR_AC10 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A6 DDR_AC11 DDR_AC11 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F7 DDR_AC12 DDR_AC12 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D6 DDR_AC13 DDR_AC13 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C6 DDR_AC14 DDR_AC14 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F6 DDR_AC15 DDR_AC15 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E6 DDR_AC16 DDR_AC16 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E5 DDR_AC17 DDR_AC17 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D8 DDR_AC18 DDR_AC18 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D10 DDR_AC19 DDR_AC19 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E10 DDR_AC20 DDR_AC20 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C10 DDR_AC21 DDR_AC21 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F11 DDR_AC22 DDR_AC22 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B10 DDR_AC23 DDR_AC23 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D11 DDR_AC24 DDR_AC24 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B11 DDR_AC25 DDR_AC25 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C11 DDR_AC26 DDR_AC26 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E11 DDR_AC27 DDR_AC27 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E12 DDR_AC28 DDR_AC28 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D12 DDR_AC29 DDR_AC29 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D5 DDR_ALERTn DDR_ALERTn IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B8 DDR_CK0N DDR_CK0N IO drive 1 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A8 DDR_CK0P DDR_CK0P IO drive 0 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B7 DDR_CK1N DDR_CK1N IO drive 1 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A7 DDR_CK1P DDR_CK1P IO drive 0 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E1 DDR_DM0 DDR_DM0 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C5 DDR_DM1 DDR_DM1 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D14 DDR_DM2 DDR_DM2 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B17 DDR_DM3 DDR_DM3 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A3 DDR_DQ0 DDR_DQ0 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B2 DDR_DQ1 DDR_DQ1 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C2 DDR_DQ2 DDR_DQ2 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D2 DDR_DQ3 DDR_DQ3 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E2 DDR_DQ4 DDR_DQ4 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
G1 DDR_DQ5 DDR_DQ5 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F2 DDR_DQ6 DDR_DQ6 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F1 DDR_DQ7 DDR_DQ7 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E3 DDR_DQ8 DDR_DQ8 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C3 DDR_DQ9 DDR_DQ9 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D3 DDR_DQ10 DDR_DQ10 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B3 DDR_DQ11 DDR_DQ11 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D4 DDR_DQ12 DDR_DQ12 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C4 DDR_DQ13 DDR_DQ13 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B4 DDR_DQ14 DDR_DQ14 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B5 DDR_DQ15 DDR_DQ15 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E13 DDR_DQ16 DDR_DQ16 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C14 DDR_DQ17 DDR_DQ17 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B14 DDR_DQ18 DDR_DQ18 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A14 DDR_DQ19 DDR_DQ19 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E14 DDR_DQ20 DDR_DQ20 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B13 DDR_DQ21 DDR_DQ21 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C13 DDR_DQ22 DDR_DQ22 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D13 DDR_DQ23 DDR_DQ23 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D15 DDR_DQ24 DDR_DQ24 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C15 DDR_DQ25 DDR_DQ25 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E16 DDR_DQ26 DDR_DQ26 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E15 DDR_DQ27 DDR_DQ27 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D16 DDR_DQ28 DDR_DQ28 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B16 DDR_DQ29 DDR_DQ29 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C16 DDR_DQ30 DDR_DQ30 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A17 DDR_DQ31 DDR_DQ31 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C1 DDR_DQS0N DDR_DQS0N IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D1 DDR_DQS0P DDR_DQS0P IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A4 DDR_DQS1N DDR_DQS1N IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A5 DDR_DQS1P DDR_DQS1P IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A12 DDR_DQS2N DDR_DQS2N IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A13 DDR_DQS2P DDR_DQS2P IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A16 DDR_DQS3N DDR_DQS3N IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A15 DDR_DQS3P DDR_DQS3P IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B19 DDR_ECC_D0 DDR_ECC_D0 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
B18 DDR_ECC_D1 DDR_ECC_D1 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C18 DDR_ECC_D2 DDR_ECC_D2 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D18 DDR_ECC_D3 DDR_ECC_D3 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E18 DDR_ECC_D4 DDR_ECC_D4 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
E17 DDR_ECC_D5 DDR_ECC_D5 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
D17 DDR_ECC_D6 DDR_ECC_D6 IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
C17 DDR_ECC_DM DDR_ECC_DM IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A18 DDR_ECC_DQSN DDR_ECC_DQSN IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
A19 DDR_ECC_DQSP DDR_ECC_DQSP IO OFF 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F16 DDR_FS_RESETn DDR_FS_RESETn IO drive 0 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR LVCMOS PD No
A11 DDR_RESETn DDR_RESETn IO drive 0 (OFF) 1.1 V/1.2 V/1.35 V VDDS_DDR DDR PU/PD No
F12 DDR_VREF0 DDR_VREF0 A 0.5*VDDS_DDR VDDS_DDR DDR No
F15 DDR_VREF_ZQ DDR_VREF_ZQ A VDDS_DDR DDR No
F13 DDR_VTP DDR_VTP A 1.1 V/1.2 V/1.35 V VDDS_DDR DDR No
D21 ECAP0_IN_APWM_OUT ECAP0_IN_APWM_OUT 0 IO OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0 0/1 Yes
SYNC0_OUT 1 O
CPTS0_RFT_CLK 2 I 0
GPIO1_86 7 IO 0
AA2 EMU0 EMU0 0 IO PU 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/1 Yes
AA1 EMU1 EMU1 0 IO PU 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/1 Yes
A22 EXT_REFCLK1 EXT_REFCLK1 0 I OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0 0/1 Yes
SYNC1_OUT 1 O
GPIO1_87 7 IO 0
P25 GPMC0_ADVn_ALE GPMC0_ADVn_ALE 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 1/1 Yes
VOUT1_DATA17 1 O
GPIO0_17 7 IO 0
BOOTMODE16 Bootstrap I 0
R28 GPMC0_CLK GPMC0_CLK 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 0/1 Yes
VOUT1_DATA16 1 O
VIN0_PCLK 2 I 0
GPMC0_FCLK_MUX 3 O
GPIO0_16 7 IO 0
T24 GPMC0_DIR GPMC0_DIR 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_HSYNC 1 O
VIN0_DATA8 2 I 0
PRG2_PWM1_B0 3 IO 1
PRG2_IEP1_EDC_SYNC_OUT0 4 O
TIMER_IO6 5 IO 0
PRG2_IEP0_EDIO_DATA_IN_OUT29 6 IO 0
GPIO0_25 7 IO 0
P26 GPMC0_OEn_REn GPMC0_OEn_REn 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 1/1 Yes
VOUT1_DATA18 1 O
GPIO0_18 7 IO 0
BOOTMODE17 Bootstrap I 0
U28 GPMC0_WEn GPMC0_WEn 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 1/1 Yes
VOUT1_DATA19 1 O
GPIO0_19 7 IO 0
BOOTMODE18 Bootstrap I 0
T25 GPMC0_WPn GPMC0_WPn 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_VSYNC 1 O
GPIO0_24 7 IO 0
M27 GPMC0_AD0 GPMC0_AD0 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA0 1 O
VIN0_DATA12 2 I 0
GPIO0_0 7 IO 0
BOOTMODE00 Bootstrap I 0
M23 GPMC0_AD1 GPMC0_AD1 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA1 1 O
VIN0_DATA13 2 I 0
GPIO0_1 7 IO 0
BOOTMODE01 Bootstrap I 0
M28 GPMC0_AD2 GPMC0_AD2 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA2 1 O
VIN0_DATA14 2 I 0
GPIO0_2 7 IO 0
BOOTMODE02 Bootstrap I 0
M24 GPMC0_AD3 GPMC0_AD3 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA3 1 O
VIN0_DATA15 2 I 0
GPIO0_3 7 IO 0
BOOTMODE03 Bootstrap I 0
N24 GPMC0_AD4 GPMC0_AD4 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA4 1 O
GPIO0_4 7 IO 0
BOOTMODE04 Bootstrap I 0
N27 GPMC0_AD5 GPMC0_AD5 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA5 1 O
GPIO0_5 7 IO 0
BOOTMODE05 Bootstrap I 0
N28 GPMC0_AD6 GPMC0_AD6 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA6 1 O
GPIO0_6 7 IO 0
BOOTMODE06 Bootstrap I 0
M25 GPMC0_AD7 GPMC0_AD7 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA7 1 O
GPIO0_7 7 IO 0
BOOTMODE07 Bootstrap I 0
N23 GPMC0_AD8 GPMC0_AD8 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA8 1 O
VIN0_DATA0 2 I 0
PRG2_PRU0_GPO12 3 IO 0
PRG2_PRU0_GPI12 4 I 0
PRG2_PWM2_A0 5 IO 0
GPIO0_8 7 IO 0
BOOTMODE08 Bootstrap I 0
M26 GPMC0_AD9 GPMC0_AD9 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA9 1 O
VIN0_DATA1 2 I 0
PRG2_PRU0_GPO13 3 IO 0
PRG2_PRU0_GPI13 4 I 0
PRG2_PWM2_B0 5 IO 1
GPIO0_9 7 IO 0
BOOTMODE09 Bootstrap I 0
P28 GPMC0_AD10 GPMC0_AD10 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA10 1 O
VIN0_DATA2 2 I 0
PRG2_PRU0_GPO14 3 IO 0
PRG2_PRU0_GPI14 4 I 0
PRG2_PWM0_TZ_IN 6 I 0
GPIO0_10 7 IO 0
BOOTMODE10 Bootstrap I 0
P27 GPMC0_AD11 GPMC0_AD11 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA11 1 O
VIN0_DATA3 2 I 0
PRG2_PRU0_GPO15 3 IO 0
PRG2_PRU0_GPI15 4 I 0
PRG2_PWM2_A1 5 IO 0
GPIO0_11 7 IO 0
BOOTMODE11 Bootstrap I 0
N26 GPMC0_AD12 GPMC0_AD12 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA12 1 O
VIN0_DATA4 2 I 0
PRG2_PRU1_GPO12 3 IO 0
PRG2_PRU1_GPI12 4 I 0
PRG2_PWM2_B1 5 IO 1
GPIO0_12 7 IO 0
BOOTMODE12 Bootstrap I 0
N25 GPMC0_AD13 GPMC0_AD13 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA13 1 O
VIN0_DATA5 2 I 0
PRG2_PRU1_GPO13 3 IO 0
PRG2_PRU1_GPI13 4 I 0
PRG2_PWM2_A2 5 IO 0
GPIO0_13 7 IO 0
BOOTMODE13 Bootstrap I 0
P24 GPMC0_AD14 GPMC0_AD14 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA14 1 O
VIN0_DATA6 2 I 0
PRG2_PRU1_GPO14 3 IO 0
PRG2_PRU1_GPI14 4 I 0
PRG2_PWM0_TZ_OUT 6 O
GPIO0_14 7 IO 0
BOOTMODE14 Bootstrap I 0
R27 GPMC0_AD15 GPMC0_AD15 0 IO OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0 1/1 Yes
VOUT1_DATA15 1 O
VIN0_DATA7 2 I 0
PRG2_PRU1_GPO15 3 IO 0
PRG2_PRU1_GPI15 4 I 0
PRG2_PWM2_B2 5 IO 1
GPIO0_15 7 IO 0
BOOTMODE15 Bootstrap I 0
T28 GPMC0_BE0n_CLE GPMC0_BE0n_CLE 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_DATA20 1 O
GPIO0_20 7 IO 0
P23 GPMC0_BE1n GPMC0_BE1n 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_DATA21 1 O
VIN0_HD 2 I 0
PRG2_PRU0_GPO17 3 IO 0
PRG2_PRU0_GPI17 4 I 0
TIMER_IO2 5 IO 0
PRG2_PWM2_TZ_IN 6 I 0
GPIO0_21 7 IO 0
R24 GPMC0_CSn0 GPMC0_CSn0 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_PCLK 1 O
GPIO0_26 7 IO 0
T23 GPMC0_CSn1 GPMC0_CSn1 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_DE 1 O
VIN0_DATA9 2 I 0
PRG2_PRU1_GPO17 3 IO 0
PRG2_PRU1_GPI17 4 I 0
TIMER_IO7 5 IO 0
PRG2_PWM2_TZ_OUT 6 O
GPIO0_27 7 IO 0
R25 GPMC0_CSn2 GPMC0_CSn2 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VOUT1_EXTPCLKIN 1 I 0
VIN0_DATA10 2 I 0
GPMC0_A27 3 OZ
PRG2_IEP1_EDC_LATCH_IN1 4 I 0
I2C2_SDA 5 IOD 1
PRG2_IEP0_EDIO_DATA_IN_OUT30 6 IO 0
GPIO0_28 7 IO 0
T27 GPMC0_CSn3 GPMC0_CSn3 0 O OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 0/1 Yes
VIN0_DATA11 2 I 0
GPMC0_A26 3 OZ
PRG2_IEP1_EDC_SYNC_OUT1 4 O
I2C2_SCL 5 IOD 1
PRG2_IEP0_EDIO_DATA_IN_OUT31 6 IO 0
GPIO0_29 7 IO 0
R26 GPMC0_WAIT0 GPMC0_WAIT0 0 I OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 1 0/1 Yes
VOUT1_DATA22 1 O
GPIO0_22 7 IO 0
R23 GPMC0_WAIT1 GPMC0_WAIT1 0 I OFF 7 1.8 V/3.3 V VDDSHV2 Yes LVCMOS PU/PD 1 0/1 Yes
VOUT1_DATA23 1 O
VIN0_VD 2 I 0
PRG2_PWM1_A0 3 IO 0
PRG2_IEP1_EDC_LATCH_IN0 4 I 0
TIMER_IO3 5 IO 0
PRG2_IEP0_EDIO_DATA_IN_OUT28 6 IO 0
GPIO0_23 7 IO 0
D20 I2C0_SCL I2C0_SCL 0 IOD OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS-FS PU/PD 1 1/1 Yes
C21 I2C0_SDA I2C0_SDA 0 IOD OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS-FS PU/PD 1 1/1 Yes
B21 I2C1_SCL I2C1_SCL 0 IOD OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS-FS PU/PD 1 1/1 Yes
CPTS0_HW1TSPUSH 1 I 0
E21 I2C1_SDA I2C1_SDA 0 IOD OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS-FS PU/PD 1 1/1 Yes
CPTS0_HW2TSPUSH 1 I 0
K2 MCU_ADC0_REFN MCU_ADC0_REFN A 1.8 V VDDA_ADC_MCU Analog No
K3 MCU_ADC0_REFP MCU_ADC0_REFP A 1.8 V VDDA_ADC_MCU Analog No
H3 MCU_ADC1_REFN MCU_ADC1_REFN A 1.8 V VDDA_ADC_MCU Analog No
H2 MCU_ADC1_REFP MCU_ADC1_REFP A 1.8 V VDDA_ADC_MCU Analog No
K5 MCU_ADC0_AIN0 MCU_ADC0_AIN0 A 1.8 V VDDA_ADC_MCU Analog No
J3 MCU_ADC0_AIN1 MCU_ADC0_AIN1 A 1.8 V VDDA_ADC_MCU Analog No
J1 MCU_ADC0_AIN2 MCU_ADC0_AIN2 A 1.8 V VDDA_ADC_MCU Analog No
J5 MCU_ADC0_AIN3 MCU_ADC0_AIN3 A 1.8 V VDDA_ADC_MCU Analog No
K4 MCU_ADC0_AIN4 MCU_ADC0_AIN4 A 1.8 V VDDA_ADC_MCU Analog No
J4 MCU_ADC0_AIN5 MCU_ADC0_AIN5 A 1.8 V VDDA_ADC_MCU Analog No
J2 MCU_ADC0_AIN6 MCU_ADC0_AIN6 A 1.8 V VDDA_ADC_MCU Analog No
J6 MCU_ADC0_AIN7 MCU_ADC0_AIN7 A 1.8 V VDDA_ADC_MCU Analog No
F4 MCU_ADC1_AIN0 MCU_ADC1_AIN0 A 1.8 V VDDA_ADC_MCU Analog No
G6 MCU_ADC1_AIN1 MCU_ADC1_AIN1 A 1.8 V VDDA_ADC_MCU Analog No
G4 MCU_ADC1_AIN2 MCU_ADC1_AIN2 A 1.8 V VDDA_ADC_MCU Analog No
H5 MCU_ADC1_AIN3 MCU_ADC1_AIN3 A 1.8 V VDDA_ADC_MCU Analog No
F5 MCU_ADC1_AIN4 MCU_ADC1_AIN4 A 1.8 V VDDA_ADC_MCU Analog No
G5 MCU_ADC1_AIN5 MCU_ADC1_AIN5 A 1.8 V VDDA_ADC_MCU Analog No
G3 MCU_ADC1_AIN6 MCU_ADC1_AIN6 A 1.8 V VDDA_ADC_MCU Analog No
H4 MCU_ADC1_AIN7 MCU_ADC1_AIN7 A 1.8 V VDDA_ADC_MCU Analog No
V5 MCU_BYP_POR MCU_BYP_POR I OFF 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS No
AD8 MCU_I2C0_SCL MCU_I2C0_SCL 0 IOD OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes I2C OPEN DRAIN 1 1/0 Yes
AD7 MCU_I2C0_SDA MCU_I2C0_SDA 0 IOD OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes I2C OPEN DRAIN 1 1/0 Yes
W2 MCU_MCAN0_RX MCU_MCAN0_RX 0 I OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_55 7 IO 0
W1 MCU_MCAN0_TX MCU_MCAN0_TX 0 O OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_54 7 IO 0
L1 MCU_MDIO0_MDC MCU_MDIO0_MDC 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
WKUP_GPIO0_47 7 IO 0
L4 MCU_MDIO0_MDIO MCU_MDIO0_MDIO 0 IO OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_46 7 IO 0
V1 MCU_OSPI0_CLK MCU_OSPI0_CLK 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_HYPERBUS0_CK 1 O
WKUP_GPIO0_12 7 IO 0
U2 MCU_OSPI0_DQS MCU_OSPI0_DQS 0 I OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_RWDS 1 IO 0
WKUP_GPIO0_14 7 IO 0
U1 MCU_OSPI0_LBCLKO MCU_OSPI0_LBCLKO 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_HYPERBUS0_CKn 1 O
WKUP_GPIO0_13 7 IO 0
T1 MCU_OSPI1_CLK MCU_OSPI1_CLK 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
WKUP_GPIO0_25 7 IO 0
P2 MCU_OSPI1_DQS MCU_OSPI1_DQS 0 I OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_OSPI0_CSn3 1 O
MCU_HYPERBUS0_INTn 2 I 1
WKUP_GPIO0_27 7 IO 0
R1 MCU_OSPI1_LBCLKO MCU_OSPI1_LBCLKO 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_OSPI0_CSn2 1 O
MCU_HYPERBUS0_RESETOn 2 I 1
WKUP_GPIO0_26 7 IO 0
R4 MCU_OSPI0_CSn0 MCU_OSPI0_CSn0 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_HYPERBUS0_CSn0 1 O
WKUP_GPIO0_23 7 IO 0
R5 MCU_OSPI0_CSn1 MCU_OSPI0_CSn1 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_HYPERBUS0_RESETn 1 O
WKUP_GPIO0_24 7 IO 0
U4 MCU_OSPI0_D0 MCU_OSPI0_D0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ0 1 IO 0
WKUP_GPIO0_15 7 IO 0
U5 MCU_OSPI0_D1 MCU_OSPI0_D1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ1 1 IO 0
WKUP_GPIO0_16 7 IO 0
T2 MCU_OSPI0_D2 MCU_OSPI0_D2 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ2 1 IO 0
WKUP_GPIO0_17 7 IO 0
T3 MCU_OSPI0_D3 MCU_OSPI0_D3 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ3 1 IO 0
WKUP_GPIO0_18 7 IO 0
T4 MCU_OSPI0_D4 MCU_OSPI0_D4 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ4 1 IO 0
WKUP_GPIO0_19 7 IO 0
T5 MCU_OSPI0_D5 MCU_OSPI0_D5 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ5 1 IO 0
WKUP_GPIO0_20 7 IO 0
R2 MCU_OSPI0_D6 MCU_OSPI0_D6 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ6 1 IO 0
WKUP_GPIO0_21 7 IO 0
R3 MCU_OSPI0_D7 MCU_OSPI0_D7 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_HYPERBUS0_DQ7 1 IO 0
WKUP_GPIO0_22 7 IO 0
N2 MCU_OSPI1_CSn0 MCU_OSPI1_CSn0 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
WKUP_GPIO0_32 7 IO 0
N3 MCU_OSPI1_CSn1 MCU_OSPI1_CSn1 0 O OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_HYPERBUS0_WPn 1 O
MCU_TIMER_IO0 2 IO 0
MCU_HYPERBUS0_CSn1 3 O
MCU_UART0_RTSn 4 O
MCU_SPI0_CS2 5 IO 1
WKUP_GPIO0_33 7 IO 0
P3 MCU_OSPI1_D0 MCU_OSPI1_D0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_28 7 IO 0
P4 MCU_OSPI1_D1 MCU_OSPI1_D1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_UART0_RXD 4 I 1
MCU_SPI1_CS1 5 IO 1
WKUP_GPIO0_29 7 IO 0
P5 MCU_OSPI1_D2 MCU_OSPI1_D2 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_UART0_TXD 4 O
MCU_SPI1_CS2 5 IO 1
WKUP_GPIO0_30 7 IO 0
P1 MCU_OSPI1_D3 MCU_OSPI1_D3 0 IO OFF 7 1.8 V/3.3 V VDDSHV1_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_UART0_CTSn 4 I 1
MCU_SPI0_CS1 5 IO 1
WKUP_GPIO0_31 7 IO 0
W5 MCU_PORz MCU_PORz I OFF 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS No
V2 MCU_PORz_OUT MCU_PORz_OUT 0 O OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0/0 No
V3 MCU_RESETSTATz MCU_RESETSTATz 0 O OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0/0 No
W4 MCU_RESETz MCU_RESETz 0 I PU 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/1 No
M1 MCU_RGMII1_RXC MCU_RGMII1_RXC 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_RMII1_REF_CLK 1 I 0
WKUP_GPIO0_41 7 IO 0
N5 MCU_RGMII1_RX_CTL MCU_RGMII1_RX_CTL 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_RMII1_RX_ER 1 I 0
WKUP_GPIO0_35 7 IO 0
N1 MCU_RGMII1_TXC MCU_RGMII1_TXC 0 IO OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_RMII1_TX_EN 1 O
WKUP_GPIO0_40 7 IO 0
N4 MCU_RGMII1_TX_CTL MCU_RGMII1_TX_CTL 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_RMII1_CRS_DV 1 I 0
WKUP_GPIO0_34 7 IO 0
L6 MCU_RGMII1_RD0 MCU_RGMII1_RD0 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_RMII1_RXD0 1 I 0
WKUP_GPIO0_45 7 IO 0
M6 MCU_RGMII1_RD1 MCU_RGMII1_RD1 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_RMII1_RXD1 1 I 0
WKUP_GPIO0_44 7 IO 0
L5 MCU_RGMII1_RD2 MCU_RGMII1_RD2 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_43 7 IO 0
L2 MCU_RGMII1_RD3 MCU_RGMII1_RD3 0 I OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_GPIO0_42 7 IO 0
M5 MCU_RGMII1_TD0 MCU_RGMII1_TD0 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_RMII1_TXD0 1 O
WKUP_GPIO0_39 7 IO 0
M4 MCU_RGMII1_TD1 MCU_RGMII1_TD1 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
MCU_RMII1_TXD1 1 O
WKUP_GPIO0_38 7 IO 0
M3 MCU_RGMII1_TD2 MCU_RGMII1_TD2 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
WKUP_GPIO0_37 7 IO 0
M2 MCU_RGMII1_TD3 MCU_RGMII1_TD3 0 O OFF 7 1.8 V/3.3 V VDDSHV2_WKUP Yes LVCMOS PU/PD 0/1 Yes
WKUP_GPIO0_36 7 IO 0
W3 MCU_SAFETY_ERRORn MCU_SAFETY_ERRORn 0 IO PD 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/0 No
Y1 MCU_SPI0_CLK MCU_SPI0_CLK 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
WKUP_GPIO0_48 7 IO 0
MCU_BOOTMODE06 Bootstrap I 0
Y4 MCU_SPI0_CS0 MCU_SPI0_CS0 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1 0/1 Yes
WKUP_GPIO0_51 7 IO 0
Y3 MCU_SPI0_D0 MCU_SPI0_D0 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
WKUP_GPIO0_49 7 IO 0
MCU_BOOTMODE07 Bootstrap I 0
Y2 MCU_SPI0_D1 MCU_SPI0_D1 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
WKUP_GPIO0_50 7 IO 0
MCU_BOOTMODE05 Bootstrap I 0
B25 MMC0_CLK MMC0_CLK 0 O PD 7 1.8 V/3.3 V VDDSHV6 LVCMOS 1 No
GPIO1_10 7 O 0
B27 MMC0_CMD MMC0_CMD 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_11 7 IO 0
C25 MMC0_DS MMC0_DS 0 I PD 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_12 7 I 0
A23 MMC0_SDCD MMC0_SDCD 0 I OFF 7 1.8 V VDDS_OSC1 Yes LVCMOS PU/PD 1 0/1 Yes
PRG2_IEP0_EDIO_OUTVALID 6 O
GPIO1_13 7 IO 0
B23 MMC0_SDWP MMC0_SDWP 0 I OFF 7 1.8 V VDDS_OSC1 Yes LVCMOS PU/PD 1 0/1 Yes
GPIO1_14 7 IO 0
C27 MMC1_CLK MMC1_CLK 0 O PD 7 1.8 V/3.3 V VDDSHV7 LVCMOS 1 No
GPIO1_77 7 O 0
C28 MMC1_CMD MMC1_CMD 0 IO PU 7 1.8 V/3.3 V VDDSHV7 LVCMOS PU/PD 1 No
GPIO1_78 7 IO 0
B24 MMC1_SDCD MMC1_SDCD 0 I OFF 7 1.8 V VDDS_OSC1 Yes LVCMOS PU/PD 1 0/1 Yes
GPIO1_79 7 IO 0
C24 MMC1_SDWP MMC1_SDWP 0 I OFF 7 1.8 V VDDS_OSC1 Yes LVCMOS PU/PD 1 0/1 Yes
GPIO1_80 7 IO 0
A26 MMC0_DAT0 MMC0_DAT0 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_9 7 IO 0
E25 MMC0_DAT1 MMC0_DAT1 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_8 7 IO 0
C26 MMC0_DAT2 MMC0_DAT2 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_7 7 IO 0
A25 MMC0_DAT3 MMC0_DAT3 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
GPIO1_6 7 IO 0
E24 MMC0_DAT4 MMC0_DAT4 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
UART0_RIN 1 I 1
EQEP2_S 5 IO 0
GPIO1_5 7 IO 0
A24 MMC0_DAT5 MMC0_DAT5 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
UART0_DTRn 1 O
EQEP2_I 5 IO 0
GPIO1_4 7 IO 0
B26 MMC0_DAT6 MMC0_DAT6 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
UART0_DSRn 1 I 1
EQEP2_B 5 I 0
GPIO1_3 7 IO 0
D25 MMC0_DAT7 MMC0_DAT7 0 IO PU 7 1.8 V/3.3 V VDDSHV6 LVCMOS PU/PD 1 No
UART0_DCDn 1 I 1
EQEP2_A 5 I 0
GPIO1_2 7 IO 0
D28 MMC1_DAT0 MMC1_DAT0 0 IO PU 7 1.8 V/3.3 V VDDSHV7 LVCMOS PU/PD 1 No
GPIO1_76 7 IO 0
E27 MMC1_DAT1 MMC1_DAT1 0 IO PU 7 1.8 V/3.3 V VDDSHV7 LVCMOS PU/PD 1 No
GPIO1_75 7 IO 0
D26 MMC1_DAT2 MMC1_DAT2 0 IO PU 7 1.8 V/3.3 V VDDSHV7 LVCMOS PU/PD 1 No
GPIO1_74 7 IO 0
D27 MMC1_DAT3 MMC1_DAT3 0 IO PU 7 1.8 V/3.3 V VDDSHV7 LVCMOS PU/PD 1 No
GPIO1_73 7 IO 0
F18 NMIn NMIn 0 I PU 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS-FS PU/PD 1 1/1 Yes
PRG2_PWM1_TZ_IN 6 I 0
L25 OLDI0_CLKN OLDI0_CLKN IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
K25 OLDI0_CLKP OLDI0_CLKP IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
J28 OLDI0_A0N OLDI0_A0N IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
K28 OLDI0_A0P OLDI0_A0P IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
L27 OLDI0_A1N OLDI0_A1N IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
K27 OLDI0_A1P OLDI0_A1P IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
K24 OLDI0_A2N OLDI0_A2N IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
J24 OLDI0_A2P OLDI0_A2P IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
J26 OLDI0_A3N OLDI0_A3N IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
K26 OLDI0_A3P OLDI0_A3P IO OFF 1.8 V VDDA_1P8_OLDI0 OLDI_LVDS No
C22 OSC1_XI OSC1_XI I OFF 1.8 V VDDS_OSC1 Analog No
E22 OSC1_XO OSC1_XO O OFF 1.8 V VDDS_OSC1 Analog No
Y5 PMIC_POWER_EN0 PMIC_POWER_EN0 0 O OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0/0 No
AA5 PMIC_POWER_EN1 PMIC_POWER_EN1 0 O OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0/0 No
E19 PORz PORz 0 I OFF 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS Yes
C19 PORz_OUT PORz_OUT 0 O OFF 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0/0 Yes
AE28 PRG0_MDIO0_MDC PRG0_MDIO0_MDC 0 O OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0/1 Yes
PRG2_PWM1_B2 3 IO 1
MCASP2_AXR3 5 IO 0
GPIO1_70 7 IO 0
AE26 PRG0_MDIO0_MDIO PRG0_MDIO0_MDIO 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PWM1_A2 3 IO 0
MCASP2_AXR2 5 IO 0
GPIO1_69 7 IO 0
V24 PRG0_PRU0_GPO0 PRG0_PRU0_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI0 1 I 0
PRG0_RGMII1_RD0 2 I 0
PRG0_PWM3_A0 3 IO 0
MCASP0_ACLKX 5 IO 0
GPIO1_29 7 IO 0
W25 PRG0_PRU0_GPO1 PRG0_PRU0_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI1 1 I 0
PRG0_RGMII1_RD1 2 I 0
PRG0_PWM3_B0 3 IO 1
MCASP0_AFSX 5 IO 0
GPIO1_30 7 IO 0
W24 PRG0_PRU0_GPO2 PRG0_PRU0_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI2 1 I 0
PRG0_RGMII1_RD2 2 I 0
PRG0_PWM2_A0 3 IO 0
MCASP0_ACLKR 5 IO 0
GPIO1_31 7 IO 0
AA27 PRG0_PRU0_GPO3 PRG0_PRU0_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI3 1 I 0
PRG0_RGMII1_RD3 2 I 0
PRG0_PWM3_A2 3 IO 0
MCASP0_AFSR 5 IO 0
GPIO1_32 7 IO 0
Y24 PRG0_PRU0_GPO4 PRG0_PRU0_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI4 1 I 0
PRG0_RGMII1_RX_CTL 2 I 0
PRG0_PWM2_B0 3 IO 1
MCASP0_AXR0 5 IO 0
GPIO1_33 7 IO 0
V28 PRG0_PRU0_GPO5 PRG0_PRU0_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI5 1 I 0
PRG0_PWM3_B2 3 IO 1
MCASP0_AXR1 5 IO 0
GPIO1_34 7 IO 0
Y25 PRG0_PRU0_GPO6 PRG0_PRU0_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI6 1 I 0
PRG0_RGMII1_RXC 2 I 0
PRG0_PWM3_A1 3 IO 0
MCASP0_AXR2 5 IO 0
GPIO1_35 7 IO 0
U27 PRG0_PRU0_GPO7 PRG0_PRU0_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI7 1 I 0
PRG0_IEP0_EDC_LATCH_IN1 2 I 0
PRG0_PWM3_B1 3 IO 1
PRG0_ECAP0_SYNC_IN 4 I 0
MCASP0_AXR3 5 IO 0
GPIO1_36 7 IO 0
V27 PRG0_PRU0_GPO8 PRG0_PRU0_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI8 1 I 0
PRG0_PWM2_A1 3 IO 0
MCASP0_AXR4 5 IO 0
GPIO1_37 7 IO 0
V26 PRG0_PRU0_GPO9 PRG0_PRU0_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI9 1 I 0
PRG0_UART0_CTSn 2 I 1
PRG0_PWM3_TZ_IN 3 I 0
SPI3_CS1 4 IO 1
MCASP0_AXR5 5 IO 0
PRG0_IEP0_EDIO_DATA_IN_OUT28 6 IO 0
GPIO1_38 7 IO 0
U25 PRG0_PRU0_GPO10 PRG0_PRU0_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI10 1 I 0
PRG0_UART0_RTSn 2 O
PRG0_PWM2_B1 3 IO 1
SPI3_CS2 4 IO 1
MCASP0_AXR6 5 IO 0
PRG0_IEP0_EDIO_DATA_IN_OUT29 6 IO 0
GPIO1_39 7 IO 0
AB25 PRG0_PRU0_GPO11 PRG0_PRU0_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI11 1 I 0
PRG0_RGMII1_TX_CTL 2 O
PRG0_PWM3_TZ_OUT 3 O
PRG0_PRU0_GPO15 4 IO 0
MCASP0_AXR7 5 IO 0
GPIO1_40 7 IO 0
AD27 PRG0_PRU0_GPO12 PRG0_PRU0_GPO12 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI12 1 I 0
PRG0_RGMII1_TD0 2 O
PRG0_PWM0_A0 3 IO 0
PRG0_PRU0_GPO11 4 IO 0
MCASP0_AXR8 5 IO 0
GPIO1_41 7 IO 0
AC26 PRG0_PRU0_GPO13 PRG0_PRU0_GPO13 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI13 1 I 0
PRG0_RGMII1_TD1 2 O
PRG0_PWM0_B0 3 IO 1
PRG0_PRU0_GPO12 4 IO 0
MCASP0_AXR9 5 IO 0
GPIO1_42 7 IO 0
AD26 PRG0_PRU0_GPO14 PRG0_PRU0_GPO14 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI14 1 I 0
PRG0_RGMII1_TD2 2 O
PRG0_PWM0_A1 3 IO 0
PRG0_PRU0_GPO13 4 IO 0
MCASP0_AXR10 5 IO 0
GPIO1_43 7 IO 0
AA24 PRG0_PRU0_GPO15 PRG0_PRU0_GPO15 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI15 1 I 0
PRG0_RGMII1_TD3 2 O
PRG0_PWM0_B1 3 IO 1
PRG0_PRU0_GPO14 4 IO 0
MCASP0_AXR11 5 IO 0
GPIO1_44 7 IO 0
AD28 PRG0_PRU0_GPO16 PRG0_PRU0_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI16 1 I 0
PRG0_RGMII1_TXC 2 IO 0
PRG0_PWM0_A2 3 IO 0
MCASP0_AXR12 5 IO 0
MCASP1_AHCLKR 6 IO 0
GPIO1_45 7 IO 0
U26 PRG0_PRU0_GPO17 PRG0_PRU0_GPO17 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI17 1 I 0
PRG0_IEP0_EDC_SYNC_OUT1 2 O
PRG0_PWM0_B2 3 IO 1
PRG0_ECAP0_SYNC_OUT 4 O
MCASP0_AXR13 5 IO 0
MCASP1_AHCLKX 6 IO 0
GPIO1_46 7 IO 0
V25 PRG0_PRU0_GPO18 PRG0_PRU0_GPO18 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI18 1 I 0
PRG0_IEP0_EDC_LATCH_IN0 2 I 0
PRG0_PWM0_TZ_IN 3 I 0
PRG0_ECAP0_IN_APWM_OUT 4 IO 0
MCASP0_AXR14 5 IO 0
MCASP2_AHCLKR 6 IO 0
GPIO1_47 7 IO 0
U24 PRG0_PRU0_GPO19 PRG0_PRU0_GPO19 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU0_GPI19 1 I 0
PRG0_IEP0_EDC_SYNC_OUT0 2 O
PRG0_PWM0_TZ_OUT 3 O
MCASP0_AXR15 5 IO 0
MCASP2_AHCLKX 6 IO 0
GPIO1_48 7 IO 0
AB28 PRG0_PRU1_GPO0 PRG0_PRU1_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI0 1 I 0
PRG0_RGMII2_RD0 2 I 0
MCASP1_ACLKX 5 IO 0
GPIO1_49 7 IO 0
AC28 PRG0_PRU1_GPO1 PRG0_PRU1_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI1 1 I 0
PRG0_RGMII2_RD1 2 I 0
MCASP1_AFSX 5 IO 0
GPIO1_50 7 IO 0
AC27 PRG0_PRU1_GPO2 PRG0_PRU1_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI2 1 I 0
PRG0_RGMII2_RD2 2 I 0
PRG0_PWM2_A2 3 IO 0
MCASP1_ACLKR 5 IO 0
GPIO1_51 7 IO 0
AB26 PRG0_PRU1_GPO3 PRG0_PRU1_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI3 1 I 0
PRG0_RGMII2_RD3 2 I 0
EQEP0_A 4 I 0
MCASP1_AFSR 5 IO 0
GPIO1_52 7 IO 0
AA25 PRG0_PRU1_GPO4 PRG0_PRU1_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI4 1 I 0
PRG0_RGMII2_RX_CTL 2 I 0
PRG0_PWM2_B2 3 IO 1
EQEP0_B 4 I 0
MCASP1_AXR0 5 IO 0
MCASP0_AHCLKR 6 IO 0
GPIO1_53 7 IO 0
U23 PRG0_PRU1_GPO5 PRG0_PRU1_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI5 1 I 0
EQEP0_S 4 IO 0
MCASP1_AXR1 5 IO 0
MCASP0_AHCLKX 6 IO 0
GPIO1_54 7 IO 0
AB27 PRG0_PRU1_GPO6 PRG0_PRU1_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI6 1 I 0
PRG0_RGMII2_RXC 2 I 0
MCASP1_AXR2 5 IO 0
GPIO1_55 7 IO 0
W28 PRG0_PRU1_GPO7 PRG0_PRU1_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI7 1 I 0
PRG0_IEP1_EDC_LATCH_IN1 2 I 0
SPI3_CS0 4 IO 1
MCASP1_AXR3 5 IO 0
UART2_TXD 6 O
GPIO1_56 7 IO 0
W27 PRG0_PRU1_GPO8 PRG0_PRU1_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI8 1 I 0
PRG0_PWM2_TZ_OUT 3 O
MCASP1_AXR4 5 IO 0
GPIO1_57 7 IO 0
Y28 PRG0_PRU1_GPO9 PRG0_PRU1_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI9 1 I 0
PRG0_UART0_RXD 2 I 1
SPI3_CS3 4 IO 1
MCASP1_AXR5 5 IO 0
PRG0_IEP0_EDIO_DATA_IN_OUT30 6 IO 0
GPIO1_58 7 IO 0
AA28 PRG0_PRU1_GPO10 PRG0_PRU1_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI10 1 I 0
PRG0_UART0_TXD 2 O
PRG0_PWM2_TZ_IN 3 I 0
EQEP0_I 4 IO 0
MCASP1_AXR6 5 IO 0
PRG0_IEP0_EDIO_DATA_IN_OUT31 6 IO 0
GPIO1_59 7 IO 0
AB24 PRG0_PRU1_GPO11 PRG0_PRU1_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI11 1 I 0
PRG0_RGMII2_TX_CTL 2 O
PRG0_PRU1_GPO15 4 IO 0
MCASP1_AXR7 5 IO 0
GPIO1_60 7 IO 0
AC25 PRG0_PRU1_GPO12 PRG0_PRU1_GPO12 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI12 1 I 0
PRG0_RGMII2_TD0 2 O
PRG0_PWM1_A0 3 IO 0
PRG0_PRU1_GPO11 4 IO 0
MCASP1_AXR8 5 IO 0
GPIO1_61 7 IO 0
AD25 PRG0_PRU1_GPO13 PRG0_PRU1_GPO13 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI13 1 I 0
PRG0_RGMII2_TD1 2 O
PRG0_PWM1_B0 3 IO 1
PRG0_PRU1_GPO12 4 IO 0
MCASP1_AXR9 5 IO 0
GPIO1_62 7 IO 0
AD24 PRG0_PRU1_GPO14 PRG0_PRU1_GPO14 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI14 1 I 0
PRG0_RGMII2_TD2 2 O
PRG0_PWM1_A1 3 IO 0
PRG0_PRU1_GPO13 4 IO 0
MCASP2_AFSR 5 IO 0
GPIO1_63 7 IO 0
AE27 PRG0_PRU1_GPO15 PRG0_PRU1_GPO15 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI15 1 I 0
PRG0_RGMII2_TD3 2 O
PRG0_PWM1_B1 3 IO 1
PRG0_PRU1_GPO14 4 IO 0
MCASP2_ACLKR 5 IO 0
GPIO1_64 7 IO 0
AC24 PRG0_PRU1_GPO16 PRG0_PRU1_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI16 1 I 0
PRG0_RGMII2_TXC 2 IO 0
PRG0_PWM1_A2 3 IO 0
MCASP2_AXR0 5 IO 0
GPIO1_65 7 IO 0
Y27 PRG0_PRU1_GPO17 PRG0_PRU1_GPO17 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI17 1 I 0
PRG0_IEP1_EDC_SYNC_OUT1 2 O
PRG0_PWM1_B2 3 IO 1
SPI3_CLK 4 IO 0
MCASP2_AXR1 5 IO 0
UART2_RXD 6 I 1
GPIO1_66 7 IO 0
Y26 PRG0_PRU1_GPO18 PRG0_PRU1_GPO18 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI18 1 I 0
PRG0_IEP1_EDC_LATCH_IN0 2 I 0
PRG0_PWM1_TZ_IN 3 I 0
SPI3_D0 4 IO 0
MCASP2_AFSX 5 IO 0
UART2_CTSn 6 I 1
GPIO1_67 7 IO 0
W26 PRG0_PRU1_GPO19 PRG0_PRU1_GPO19 0 IO OFF 7 1.8 V/3.3 V VDDSHV3 Yes LVCMOS PU/PD 0 0/1 Yes
PRG0_PRU1_GPI19 1 I 0
PRG0_IEP1_EDC_SYNC_OUT0 2 O
PRG0_PWM1_TZ_OUT 3 O
SPI3_D1 4 IO 0
MCASP2_ACLKX 5 IO 0
UART2_RTSn 6 O
GPIO1_68 7 IO 0
AH18 PRG1_MDIO0_MDC PRG1_MDIO0_MDC 0 O OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0/1 Yes
SPI1_CS3 1 IO 1
PRG2_PWM1_B1 3 IO 1
GPIO1_1 7 IO 0
AD18 PRG1_MDIO0_MDIO PRG1_MDIO0_MDIO 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
SPI1_CS2 1 IO 1
PRG2_PWM1_A1 3 IO 0
GPIO1_0 7 IO 0
AE22 PRG1_PRU0_GPO0 PRG1_PRU0_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI0 1 I 0
PRG1_RGMII1_RD0 2 I 0
PRG1_PWM3_A0 3 IO 0
GPIO0_56 7 IO 0
AG24 PRG1_PRU0_GPO1 PRG1_PRU0_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI1 1 I 0
PRG1_RGMII1_RD1 2 I 0
PRG1_PWM3_B0 3 IO 1
GPIO0_57 7 IO 0
AF23 PRG1_PRU0_GPO2 PRG1_PRU0_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI2 1 I 0
PRG1_RGMII1_RD2 2 I 0
PRG1_PWM2_A0 3 IO 0
GPIO0_58 7 IO 0
AD21 PRG1_PRU0_GPO3 PRG1_PRU0_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI3 1 I 0
PRG1_RGMII1_RD3 2 I 0
PRG1_PWM3_A2 3 IO 0
GPIO0_59 7 IO 0
AG23 PRG1_PRU0_GPO4 PRG1_PRU0_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI4 1 I 0
PRG1_RGMII1_RX_CTL 2 I 0
PRG1_PWM2_B0 3 IO 1
GPIO0_60 7 IO 0
AF27 PRG1_PRU0_GPO5 PRG1_PRU0_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI5 1 I 0
PRG1_PWM3_B2 3 IO 1
GPIO0_61 7 IO 0
AF22 PRG1_PRU0_GPO6 PRG1_PRU0_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI6 1 I 0
PRG1_RGMII1_RXC 2 I 0
PRG1_PWM3_A1 3 IO 0
GPIO0_62 7 IO 0
AG27 PRG1_PRU0_GPO7 PRG1_PRU0_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI7 1 I 0
PRG1_IEP0_EDC_LATCH_IN1 2 I 0
PRG1_PWM3_B1 3 IO 1
GPIO0_63 7 IO 0
AF28 PRG1_PRU0_GPO8 PRG1_PRU0_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI8 1 I 0
PRG1_PWM2_A1 3 IO 0
GPIO0_64 7 IO 0
AF26 PRG1_PRU0_GPO9 PRG1_PRU0_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI9 1 I 0
PRG1_UART0_CTSn 2 I 1
PRG1_PWM3_TZ_IN 3 I 0
SPI2_CS1 4 IO 1
PRG1_IEP0_EDIO_DATA_IN_OUT28 6 IO 0
GPIO0_65 7 IO 0
AH25 PRG1_PRU0_GPO10 PRG1_PRU0_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI10 1 I 0
PRG1_UART0_RTSn 2 O
PRG1_PWM2_B1 3 IO 1
SPI2_CS2 4 IO 1
PRG1_IEP0_EDIO_DATA_IN_OUT29 6 IO 0
GPIO0_66 7 IO 0
AF21 PRG1_PRU0_GPO11 PRG1_PRU0_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI11 1 I 0
PRG1_RGMII1_TX_CTL 2 O
PRG1_PWM3_TZ_OUT 3 O
PRG1_PRU0_GPO15 5 IO 0
GPIO0_67 7 IO 0
AH20 PRG1_PRU0_GPO12 PRG1_PRU0_GPO12 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI12 1 I 0
PRG1_RGMII1_TD0 2 O
PRG1_PWM0_A0 3 IO 0
PRG1_PRU0_GPO11 5 IO 0
GPIO0_68 7 IO 0
AH21 PRG1_PRU0_GPO13 PRG1_PRU0_GPO13 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI13 1 I 0
PRG1_RGMII1_TD1 2 O
PRG1_PWM0_B0 3 IO 1
PRG1_PRU0_GPO12 5 IO 0
GPIO0_69 7 IO 0
AG20 PRG1_PRU0_GPO14 PRG1_PRU0_GPO14 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI14 1 I 0
PRG1_RGMII1_TD2 2 O
PRG1_PWM0_A1 3 IO 0
PRG1_PRU0_GPO13 5 IO 0
GPIO0_70 7 IO 0
AD19 PRG1_PRU0_GPO15 PRG1_PRU0_GPO15 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI15 1 I 0
PRG1_RGMII1_TD3 2 O
PRG1_PWM0_B1 3 IO 1
PRG1_PRU0_GPO14 5 IO 0
GPIO0_71 7 IO 0
AD20 PRG1_PRU0_GPO16 PRG1_PRU0_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI16 1 I 0
PRG1_RGMII1_TXC 2 IO 0
PRG1_PWM0_A2 3 IO 0
GPIO0_72 7 IO 0
AH26 PRG1_PRU0_GPO17 PRG1_PRU0_GPO17 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI17 1 I 0
PRG1_IEP0_EDC_SYNC_OUT1 2 O
PRG1_PWM0_B2 3 IO 1
GPIO0_73 7 IO 0
AG25 PRG1_PRU0_GPO18 PRG1_PRU0_GPO18 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI18 1 I 0
PRG1_IEP0_EDC_LATCH_IN0 2 I 0
PRG1_PWM0_TZ_IN 3 I 0
GPIO0_74 7 IO 0
AG26 PRG1_PRU0_GPO19 PRG1_PRU0_GPO19 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU0_GPI19 1 I 0
PRG1_IEP0_EDC_SYNC_OUT0 2 O
PRG1_PWM0_TZ_OUT 3 O
GPIO0_75 7 IO 0
AH24 PRG1_PRU1_GPO0 PRG1_PRU1_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI0 1 I 0
PRG1_RGMII2_RD0 2 I 0
GPIO0_76 7 IO 0
AH23 PRG1_PRU1_GPO1 PRG1_PRU1_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI1 1 I 0
PRG1_RGMII2_RD1 2 I 0
GPIO0_77 7 IO 0
AG21 PRG1_PRU1_GPO2 PRG1_PRU1_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI2 1 I 0
PRG1_RGMII2_RD2 2 I 0
PRG1_PWM2_A2 3 IO 0
GPIO0_78 7 IO 0
AH22 PRG1_PRU1_GPO3 PRG1_PRU1_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI3 1 I 0
PRG1_RGMII2_RD3 2 I 0
EQEP1_A 4 I 0
GPIO0_79 7 IO 0
AE21 PRG1_PRU1_GPO4 PRG1_PRU1_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI4 1 I 0
PRG1_RGMII2_RX_CTL 2 I 0
PRG1_PWM2_B2 3 IO 1
EQEP1_B 4 I 0
GPIO0_80 7 IO 0
AC22 PRG1_PRU1_GPO5 PRG1_PRU1_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI5 1 I 0
EQEP1_S 4 IO 0
GPIO0_81 7 IO 0
AG22 PRG1_PRU1_GPO6 PRG1_PRU1_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI6 1 I 0
PRG1_RGMII2_RXC 2 I 0
GPIO0_82 7 IO 0
AD23 PRG1_PRU1_GPO7 PRG1_PRU1_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI7 1 I 0
PRG1_IEP1_EDC_LATCH_IN1 2 I 0
SPI2_CS0 4 IO 1
UART1_TXD 6 O
GPIO0_83 7 IO 0
AE24 PRG1_PRU1_GPO8 PRG1_PRU1_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI8 1 I 0
PRG1_PWM2_TZ_OUT 3 O
GPIO0_84 7 IO 0
AF25 PRG1_PRU1_GPO9 PRG1_PRU1_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI9 1 I 0
PRG1_UART0_RXD 2 I 1
PRG1_IEP0_EDIO_DATA_IN_OUT30 6 IO 0
GPIO0_85 7 IO 0
AF24 PRG1_PRU1_GPO10 PRG1_PRU1_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI10 1 I 0
PRG1_UART0_TXD 2 O
PRG1_PWM2_TZ_IN 3 I 0
SPI2_CS3 4 IO 1
PRG1_IEP0_EDIO_DATA_IN_OUT31 6 IO 0
GPIO0_86 7 IO 0
AC20 PRG1_PRU1_GPO11 PRG1_PRU1_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI11 1 I 0
PRG1_RGMII2_TX_CTL 2 O
EQEP1_I 4 IO 0
PRG1_PRU1_GPO15 5 IO 0
GPIO0_87 7 IO 0
AE20 PRG1_PRU1_GPO12 PRG1_PRU1_GPO12 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI12 1 I 0
PRG1_RGMII2_TD0 2 O
PRG1_PWM1_A0 3 IO 0
PRG1_PRU1_GPO11 5 IO 0
GPIO0_88 7 IO 0
AF19 PRG1_PRU1_GPO13 PRG1_PRU1_GPO13 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI13 1 I 0
PRG1_RGMII2_TD1 2 O
PRG1_PWM1_B0 3 IO 1
PRG1_PRU1_GPO12 5 IO 0
GPIO0_89 7 IO 0
AH19 PRG1_PRU1_GPO14 PRG1_PRU1_GPO14 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI14 1 I 0
PRG1_RGMII2_TD2 2 O
PRG1_PWM1_A1 3 IO 0
PRG1_PRU1_GPO13 5 IO 0
GPIO0_90 7 IO 0
AG19 PRG1_PRU1_GPO15 PRG1_PRU1_GPO15 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI15 1 I 0
PRG1_RGMII2_TD3 2 O
PRG1_PWM1_B1 3 IO 1
PRG1_PRU1_GPO14 5 IO 0
GPIO0_91 7 IO 0
AE19 PRG1_PRU1_GPO16 PRG1_PRU1_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI16 1 I 0
PRG1_RGMII2_TXC 2 IO 0
PRG1_PWM1_A2 3 IO 0
GPIO0_92 7 IO 0
AE23 PRG1_PRU1_GPO17 PRG1_PRU1_GPO17 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI17 1 I 0
PRG1_IEP1_EDC_SYNC_OUT1 2 O
PRG1_PWM1_B2 3 IO 1
SPI2_CLK 4 IO 0
PRG1_ECAP0_SYNC_OUT 5 O
UART1_RXD 6 I 1
GPIO0_93 7 IO 0
AD22 PRG1_PRU1_GPO18 PRG1_PRU1_GPO18 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI18 1 I 0
PRG1_IEP1_EDC_LATCH_IN0 2 I 0
PRG1_PWM1_TZ_IN 3 I 0
SPI2_D0 4 IO 0
PRG1_ECAP0_SYNC_IN 5 I 0
UART1_CTSn 6 I 1
GPIO0_94 7 IO 0
AC21 PRG1_PRU1_GPO19 PRG1_PRU1_GPO19 0 IO OFF 7 1.8 V/3.3 V VDDSHV4 Yes LVCMOS PU/PD 0 0/1 Yes
PRG1_PRU1_GPI19 1 I 0
PRG1_IEP1_EDC_SYNC_OUT0 2 O
PRG1_PWM1_TZ_OUT 3 O
SPI2_D1 4 IO 0
PRG1_ECAP0_IN_APWM_OUT 5 IO 0
UART1_RTSn 6 O
GPIO0_95 7 IO 0
AF18 PRG2_PRU0_GPO0 PRG2_PRU0_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI0 1 I 0
PRG2_RGMII1_RD0 2 I 0
GPMC0_A25 3 OZ
TRC_CLK 4 O
EHRPWM0_SYNCI 5 I 0
PRG2_PWM3_A0 6 IO 0
GPIO0_30 7 IO 0
AE18 PRG2_PRU0_GPO1 PRG2_PRU0_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI1 1 I 0
PRG2_RGMII1_RD1 2 I 0
GPMC0_A24 3 OZ
TRC_CTL 4 O
EHRPWM0_SYNCO 5 O
SYNC2_OUT 6 O
GPIO0_31 7 IO 0
AH17 PRG2_PRU0_GPO2 PRG2_PRU0_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI2 1 I 0
PRG2_RGMII1_RD2 2 I 0
GPMC0_A23 3 OZ
TRC_DATA0 4 O
EHRPWM_TZn_IN0 5 I 0
SYNC3_OUT 6 O
GPIO0_32 7 IO 0
AG18 PRG2_PRU0_GPO3 PRG2_PRU0_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI3 1 I 0
PRG2_RGMII1_RD3 2 I 0
GPMC0_A22 3 OZ
TRC_DATA1 4 O
EHRPWM0_A 5 IO 0
PRG2_PWM3_B0 6 IO 1
GPIO0_33 7 IO 0
AG17 PRG2_PRU0_GPO4 PRG2_PRU0_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI4 1 I 0
PRG2_RGMII1_RX_CTL 2 I 0
GPMC0_A21 3 OZ
TRC_DATA2 4 O
EHRPWM0_B 5 IO 0
PRG2_PWM0_A0 6 IO 0
GPIO0_34 7 IO 0
AF17 PRG2_PRU0_GPO5 PRG2_PRU0_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI5 1 I 0
PRG2_RGMII1_RXC 2 I 0
GPMC0_A20 3 OZ
TRC_DATA3 4 O
EHRPWM1_A 5 IO 0
PRG2_PWM3_A1 6 IO 0
GPIO0_35 7 IO 0
AE17 PRG2_PRU0_GPO6 PRG2_PRU0_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI6 1 I 0
PRG2_RGMII1_TX_CTL 2 O
GPMC0_A19 3 OZ
TRC_DATA4 4 O
EHRPWM1_B 5 IO 0
PRG2_PWM3_B1 6 IO 1
GPIO0_36 7 IO 0
AC19 PRG2_PRU0_GPO7 PRG2_PRU0_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI7 1 I 0
PRG2_MDIO0_MDIO 2 IO 0
GPMC0_A18 3 OZ
TRC_DATA5 4 O
EHRPWM_TZn_IN1 5 I 0
EHRPWM_SOCA 6 O
GPIO0_37 7 IO 0
AH16 PRG2_PRU0_GPO8 PRG2_PRU0_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI8 1 I 0
PRG2_RGMII1_TD0 2 O
GPMC0_A17 3 OZ
TRC_DATA6 4 O
EHRPWM2_A 5 IO 0
PRG2_PWM0_B0 6 IO 1
GPIO0_38 7 IO 0
AG16 PRG2_PRU0_GPO9 PRG2_PRU0_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI9 1 I 0
PRG2_RGMII1_TD1 2 O
GPMC0_A16 3 OZ
TRC_DATA7 4 O
EHRPWM2_B 5 IO 0
GPIO0_39 7 IO 0
AF16 PRG2_PRU0_GPO10 PRG2_PRU0_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI10 1 I 0
PRG2_RGMII1_TD2 2 O
GPMC0_A15 3 OZ
TRC_DATA8 4 O
EHRPWM_TZn_IN2 5 I 0
EHRPWM_SOCB 6 O
GPIO0_40 7 IO 0
AE16 PRG2_PRU0_GPO11 PRG2_PRU0_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI11 1 I 0
PRG2_RGMII1_TD3 2 O
GPMC0_A14 3 OZ
TRC_DATA9 4 O
PRG2_ECAP0_IN_APWM_OUT 6 IO 0
GPIO0_41 7 IO 0
AD16 PRG2_PRU0_GPO16 PRG2_PRU0_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU0_GPI16 1 I 0
PRG2_RGMII1_TXC 2 IO 0
GPMC0_A13 3 OZ
TRC_DATA10 4 O
PRG2_PWM0_A1 6 IO 0
GPIO0_42 7 IO 0
AH15 PRG2_PRU1_GPO0 PRG2_PRU1_GPO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI0 1 I 0
PRG2_RGMII2_RD0 2 I 0
GPMC0_A12 3 OZ
TRC_DATA11 4 O
EHRPWM3_A 5 IO 0
PRG2_PWM3_A2 6 IO 0
GPIO0_43 7 IO 0
AC16 PRG2_PRU1_GPO1 PRG2_PRU1_GPO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI1 1 I 0
PRG2_RGMII2_RD1 2 I 0
GPMC0_A11 3 OZ
TRC_DATA12 4 O
EHRPWM3_B 5 IO 0
PRG2_PWM3_B2 6 IO 1
GPIO0_44 7 IO 0
AD17 PRG2_PRU1_GPO2 PRG2_PRU1_GPO2 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI2 1 I 0
PRG2_RGMII2_RD2 2 I 0
GPMC0_A10 3 OZ
TRC_DATA13 4 O
EHRPWM3_SYNCI 5 I 0
PRG2_PWM0_B1 6 IO 1
GPIO0_45 7 IO 0
AH14 PRG2_PRU1_GPO3 PRG2_PRU1_GPO3 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI3 1 I 0
PRG2_RGMII2_RD3 2 I 0
GPMC0_A9 3 OZ
TRC_DATA14 4 O
EHRPWM3_SYNCO 5 O
GPIO0_46 7 IO 0
AG14 PRG2_PRU1_GPO4 PRG2_PRU1_GPO4 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI4 1 I 0
PRG2_RGMII2_RX_CTL 2 I 0
GPMC0_A8 3 OZ
TRC_DATA15 4 O
EHRPWM_TZn_IN3 5 I 0
PRG2_ECAP0_SYNC_OUT 6 O
GPIO0_47 7 IO 0
AG15 PRG2_PRU1_GPO5 PRG2_PRU1_GPO5 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI5 1 I 0
PRG2_RGMII2_RXC 2 I 0
GPMC0_A7 3 OZ
TRC_DATA16 4 O
EHRPWM4_A 5 IO 0
GPIO0_48 7 IO 0
AC17 PRG2_PRU1_GPO6 PRG2_PRU1_GPO6 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI6 1 I 0
PRG2_RGMII2_TX_CTL 2 O
GPMC0_A6 3 OZ
TRC_DATA17 4 O
EHRPWM4_B 5 IO 0
GPIO0_49 7 IO 0
AE15 PRG2_PRU1_GPO7 PRG2_PRU1_GPO7 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI7 1 I 0
PRG2_MDIO0_MDC 2 O
GPMC0_A5 3 OZ
TRC_DATA18 4 O
EHRPWM_TZn_IN4 5 I 0
PRG2_PWM3_TZ_IN 6 I 0
GPIO0_50 7 IO 0
AD15 PRG2_PRU1_GPO8 PRG2_PRU1_GPO8 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI8 1 I 0
PRG2_RGMII2_TD0 2 O
GPMC0_A4 3 OZ
TRC_DATA19 4 O
EHRPWM5_A 5 IO 0
PRG2_PWM0_A2 6 IO 0
GPIO0_51 7 IO 0
AF14 PRG2_PRU1_GPO9 PRG2_PRU1_GPO9 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI9 1 I 0
PRG2_RGMII2_TD1 2 O
GPMC0_A3 3 OZ
TRC_DATA20 4 O
EHRPWM5_B 5 IO 0
PRG2_PWM3_TZ_OUT 6 O
GPIO0_52 7 IO 0
AC15 PRG2_PRU1_GPO10 PRG2_PRU1_GPO10 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI10 1 I 0
PRG2_RGMII2_TD2 2 O
GPMC0_A2 3 OZ
TRC_DATA21 4 O
EHRPWM_TZn_IN5 5 I 0
PRG2_PWM0_B2 6 IO 1
GPIO0_53 7 IO 0
AD14 PRG2_PRU1_GPO11 PRG2_PRU1_GPO11 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI11 1 I 0
PRG2_RGMII2_TD3 2 O
GPMC0_A1 3 OZ
TRC_DATA22 4 O
PRG2_ECAP0_SYNC_IN 6 I 0
GPIO0_54 7 IO 0
AE14 PRG2_PRU1_GPO16 PRG2_PRU1_GPO16 0 IO OFF 7 1.8 V/3.3 V VDDSHV5 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_PRU1_GPI16 1 I 0
PRG2_RGMII2_TXC 2 IO 0
GPMC0_A0 3 OZ
TRC_DATA23 4 O
PRG2_PWM1_TZ_OUT 6 O
GPIO0_55 7 IO 0
AF9 REFCLK0N REFCLK0N O OFF 1.8 V VDDA_1P8_SERDES0 LJCB CLK No
AF10 REFCLK0P REFCLK0P O OFF 1.8 V VDDA_1P8_SERDES0 LJCB CLK No
AE8 REFCLK1N REFCLK1N O OFF 1.8 V VDDA_1P8_SERDES0 LJCB CLK No
AE9 REFCLK1P REFCLK1P O OFF 1.8 V VDDA_1P8_SERDES0 LJCB CLK No
D19 RESETSTATz RESETSTATz 0 O OFF 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0/0 Yes
F17 RESETz RESETz 0 I PU 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 1/1 Yes
AG5 SERDES0_REFCLKN SERDES0_REFCLKN I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AG6 SERDES0_REFCLKP SERDES0_REFCLKP I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AC9 SERDES0_REFRES SERDES0_REFRES A 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AH3 SERDES0_RXN SERDES0_RXN I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AG2 SERDES0_RXP SERDES0_RXP I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AH4 SERDES0_TXN SERDES0_TXN O OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AG3 SERDES0_TXP SERDES0_TXP O OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES0 No
AH6 SERDES1_REFCLKN SERDES1_REFCLKN I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AH7 SERDES1_REFCLKP SERDES1_REFCLKP I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AC14 SERDES1_REFRES SERDES1_REFRES A 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AG9 SERDES1_RXN SERDES1_RXN I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AH10 SERDES1_RXP SERDES1_RXP I OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AH9 SERDES1_TXN SERDES1_TXN O OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
AG8 SERDES1_TXP SERDES1_TXP O OFF 0 1.8 V VDDA_1P8_SERDES0 SERDES1 No
E20 SOC_SAFETY_ERRORn SOC_SAFETY_ERRORn 0 IO PD 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 1/0 Yes
AH13 SPI0_CLK SPI0_CLK 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
GPIO1_17 7 IO 0
AH12 SPI1_CLK SPI1_CLK 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_IEP0_EDC_SYNC_OUT0 3 O
PRG2_UART0_RTSn 4 O
GPIO1_22 7 IO 0
AG13 SPI0_CS0 SPI0_CS0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
GPIO1_15 7 IO 0
AF13 SPI0_CS1 SPI0_CS1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
CPTS0_TS_COMP 1 O
I2C3_SCL 2 IOD 1
PRG1_IEP0_EDIO_OUTVALID 6 O
GPIO1_16 7 IO 0
AE13 SPI0_D0 SPI0_D0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
GPIO1_18 7 IO 0
AD13 SPI0_D1 SPI0_D1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
GPIO1_19 7 IO 0
AD12 SPI1_CS0 SPI1_CS0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
PRG2_IEP0_EDC_LATCH_IN0 3 I 0
PRG2_UART0_CTSn 4 I 1
PRG0_IEP0_EDIO_OUTVALID 6 O
GPIO1_20 7 IO 0
AG12 SPI1_CS1 SPI1_CS1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
CPTS0_TS_SYNC 1 O
I2C3_SDA 2 IOD 1
GPIO1_21 7 IO 0
AE12 SPI1_D0 SPI1_D0 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_IEP0_EDC_LATCH_IN1 3 I 0
PRG2_UART0_RXD 4 I 1
GPIO1_23 7 IO 0
AF12 SPI1_D1 SPI1_D1 0 IO OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0 0/1 Yes
PRG2_IEP0_EDC_SYNC_OUT1 3 O
PRG2_UART0_TXD 4 O
GPIO1_24 7 IO 0
AA4 TCK TCK 0 I PU 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/1 Yes
C20 TDI TDI 0 I PU 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 1/1 Yes
A20 TDO TDO 0 OZ PU 0 1.8 V/3.3 V VDDSHV0 LVCMOS PU/PD 0/0 Yes
W6 TEMP_DIODE_P TEMP_DIODE_P A 1.8 V Power No
B22 TIMER_IO0 TIMER_IO0 0 IO OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0 0/1 Yes
SYSCLKOUT0 2 O
GPIO1_88 7 IO 0
C23 TIMER_IO1 TIMER_IO1 0 IO OFF 7 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 0 0/1 Yes
OBSCLK0 2 O
GPIO1_89 7 IO 0
A21 TMS TMS 0 I PU 0 1.8 V/3.3 V VDDSHV0 Yes LVCMOS PU/PD 1/1 Yes
AA3 TRSTn TRSTn 0 I PD 0 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1/1 Yes
AG11 UART0_CTSn UART0_CTSn 0 I OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
TIMER_IO4 1 IO 0
SPI0_CS2 2 IO 1
GPIO1_27 7 IO 0
AD11 UART0_RTSn UART0_RTSn 0 O OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0/1 Yes
TIMER_IO5 1 IO 0
SPI0_CS3 2 IO 1
GPIO1_28 7 IO 0
AF11 UART0_RXD UART0_RXD 0 I OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 1 0/1 Yes
GPIO1_25 7 IO 0
AE11 UART0_TXD UART0_TXD 0 O OFF 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD 0/1 Yes
GPIO1_26 7 IO 0
AE2 USB0_DM USB0_DM IO OFF 3.3 V VDDA_3P3_USB USBHS No
AF1 USB0_DP USB0_DP IO OFF 3.3 V VDDA_3P3_USB USBHS No
AD9 USB0_DRVVBUS USB0_DRVVBUS 0 O PD 0 1.8 V/3.3 V VDDSHV8 Yes LVCMOS PU/PD 0/0 Yes
GPIO1_71 7 IO 0
AF7 USB0_ID USB0_ID A 3.3 V VDDA_3P3_USB USBHS No
AE7 USB0_VBUS USB0_VBUS A VDDA_3P3_USB USBHS No
AD2 USB1_DM USB1_DM IO OFF 3.3 V VDDA_3P3_USB USBHS No
AE1 USB1_DP USB1_DP IO OFF 3.3 V VDDA_3P3_USB USBHS No
AC8 USB1_DRVVBUS USB1_DRVVBUS 0 O PD 0 1.8 V/3.3 V VDDSHV8 Yes LVCMOS PU/PD 0/0 Yes
GPIO1_72 7 IO 0
AF5 USB1_ID USB1_ID A 3.3 V VDDA_3P3_USB USBHS No
AF6 USB1_VBUS USB1_VBUS A VDDA_3P3_USB USBHS No
AB6 VDDA_1P8_MON_WKUP VDDA_1P8_MON0 A 1.8 V Power No
G17 VDDA_1P8_SDIO VDDA_1P8_SDIO PWR
L20, M21 VDDA_1P8_CSI0 VDDA_1P8_CSI0 PWR
AC6 VDDA_1P8_MON0 VDDA_1P8_MON0 A 1.8 V Power No
L22 VDDA_1P8_OLDI0 VDDA_1P8_OLDI0 PWR
AA14, AB13, AB15 VDDA_1P8_SERDES0 VDDA_1P8_SERDES0 PWR
AB9 VDDA_3P3_IOLDO_WKUP VDDA_3P3_IOLDO_WKUP PWR
U6 VDDA_3P3_MON_WKUP VDDA_3P3_MON0 A 3.3 V Power No
H17 VDDA_3P3_SDIO VDDA_3P3_SDIO PWR
AC12 VDDA_3P3_USB VDDA_3P3_USB PWR
G18 VDDA_3P3_IOLDO0 VDDA_3P3_IOLDO0 PWR
AA21 VDDA_3P3_IOLDO1 VDDA_3P3_IOLDO1 PWR
AC10 VDDA_3P3_MON0 VDDA_3P3_MON0 A 3.3 V Power No
M7, M9 VDDA_ADC_MCU VDDA_ADC_MCU PWR
AB8 VDDA_LDO_WKUP VDDA_LDO_WKUP PWR
U12 VDDA_MCU VDDA_MCU PWR
H15 VDDA_PLL0_DDR VDDA_PLL0_DDR PWR
H11 VDDA_PLL1_DDR VDDA_PLL1_DDR PWR
Y17 VDDA_PLL_CORE VDDA_PLL_CORE PWR
L21 VDDA_PLL_DSS VDDA_PLL_DSS PWR
L12 VDDA_PLL_MPU0 VDDA_PLL_MPU0 PWR
K15 VDDA_PLL_MPU1 VDDA_PLL_MPU1 PWR
AB7 VDDA_PLL_PER0 VDDA_PLL_PER0 PWR
Y9 VDDA_POR_WKUP VDDA_POR_WKUP PWR
M19 VDDA_SRAM_CORE0 VDDA_SRAM_CORE0 PWR
V16 VDDA_SRAM_CORE1 VDDA_SRAM_CORE1 PWR
K7 VDDA_SRAM_MPU0 VDDA_SRAM_MPU0 PWR
L18 VDDA_SRAM_MPU1 VDDA_SRAM_MPU1 PWR
AC11 VDDA_VSYS_MON VDDA_VSYS_MON A 0.5 V? Power No
AA9 VDDA_WKUP VDDA_WKUP PWR
G12 VDDS0 VDDS0 PWR
V8 VDDS0_WKUP VDDS0_WKUP PWR
AA16 VDDS1 VDDS1 PWR
T9 VDDS1_WKUP VDDS1_WKUP PWR
P20 VDDS2 VDDS2 PWR
N8 VDDS2_WKUP VDDS2_WKUP PWR
T20 VDDS3 VDDS3 PWR
Y20 VDDS4 VDDS4 PWR
AC18 VDDS5 VDDS5 PWR
F20 VDDS6 VDDS6 PWR
K20 VDDS7 VDDS7 PWR
AA10 VDDS8 VDDS8 PWR
G15, H16 VDDSHV0 VDDSHV0 PWR
U8, V7, W8, Y7 VDDSHV0_WKUP VDDSHV0_WKUP PWR
AA18, AB17 VDDSHV1 VDDSHV1 PWR
R6, R8, T7 VDDSHV1_WKUP VDDSHV1_WKUP PWR
N20, N22, P21, R20, R22 VDDSHV2 VDDSHV2 PWR
N6, P7, P9 VDDSHV2_WKUP VDDSHV2_WKUP PWR
T21, U20, U22, V21, V23 VDDSHV3 VDDSHV3 PWR
AA22, W20, W22, Y21, Y23 VDDSHV4 VDDSHV4 PWR
AA20, AB19, AB21, AB23 VDDSHV5 VDDSHV5 PWR
G20, H19, H21 VDDSHV6 VDDSHV6 PWR
J20, J22, K21 VDDSHV7 VDDSHV7 PWR
AB11 VDDSHV8 VDDSHV8 PWR
G10, G14, G8, H13, H7, H9 VDDS_DDR VDDS_DDR PWR
J16 VDDS_OSC1 VDDS_OSC1 PWR
AA12, J10, J12, J14, J19, J8, K13, L14, L19, M13, N14, P13, P15, P19, R14, R16, R18, T13, T15, T17, T19, U14, U16, U18, V13, V15, V19, W14, W18, Y11, Y13, Y15 VDD_CORE VDD_CORE PWR
G22 VDD_DLL_MMC0 VDD_DLL_MMC0 PWR
H23 VDD_DLL_MMC1 VDD_DLL_MMC1 PWR
N10, P11, R10, R12, T11 VDD_MCU VDD_MCU PWR
K11, K9, L10, L8, M11 VDD_MPU0 VDD_MPU0 PWR
K16, K18, L17, M16, M18, N17 VDD_MPU1 VDD_MPU1 PWR
V11, W10, W12 VDD_WKUP0 VDD_WKUP0 PWR
M22 VDD_WKUP1 VDD_WKUP1 PWR
F21 VPP_CORE VPP_CORE PWR OFF 1.8 V Power No
T6 VPP_MCU VPP_MCU PWR OFF 1.8 V Power No
A1, A2, A28, AA11, AA13, AA15, AA17, AA19, AA23, AA26, AA7, AB10, AB12, AB14, AB16, AB18, AB20, AB22, AD4, AE10, AE25, AE5, AF15, AF2, AF20, AF8, AG1, AG10, AG28, AG4, AG7, AH1, AH11, AH2, AH27, AH28, AH5, AH8, B12, B15, B20, B6, B9, D22, E26, E28, E4, F14, F19, F22, F25, F27, F3, G11, G13, G16, G2, G21, G23, G7, G9, H1, H10, H12, H14, H20, H22, H24, H26, H28, H6, H8, J11, J13, J15, J18, J21, J23, J25, J27, J7, J9, K1, K10, K12, K14, K17, K19, K22, K23, K6, K8, L11, L13, L16, L23, L24, L26, L28, L3, L7, L9, M10, M15, M17, M20, M8, N11, N13, N16, N19, N21, N7, N9, P10, P12, P14, P16, P18, P22, P6, P8, R11, R13, R15, R17, R19, R21, R7, R9, T10, T12, T14, T16, T18, T22, T26, T8, U11, U13, U15, U17, U19, U21, U3, U7, U9, V10, V12, V14, V18, V20, V22, V6, W11, W13, W15, W17, W19, W21, W23, W7, W9, Y12, Y14, Y16, Y18, Y22, Y6, Y8 VSS VSS GND
AF4 WKUP_GPIO0_0 WKUP_GPIO0_0 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_SPI1_CLK 1 IO 0
WKUP_GPIO0_0 7 IO 0
MCU_BOOTMODE00 Bootstrap I 0
AF3 WKUP_GPIO0_1 WKUP_GPIO0_1 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_SPI1_D0 1 IO 0
WKUP_GPIO0_1 7 IO 0
MCU_BOOTMODE01 Bootstrap I 0
AE3 WKUP_GPIO0_2 WKUP_GPIO0_2 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_SPI1_D1 1 IO 0
WKUP_GPIO0_2 7 IO 0
MCU_BOOTMODE02 Bootstrap I 0
AD1 WKUP_GPIO0_3 WKUP_GPIO0_3 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_SPI1_CS0 1 IO 1
WKUP_GPIO0_3 7 IO 0
MCU_BOOTMODE03 Bootstrap I 0
AC3 WKUP_GPIO0_4 WKUP_GPIO0_4 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_MCAN1_TX 1 O
MCU_SPI0_CS3 2 IO 1
MCU_ADC_EXT_TRIGGER0 3 I 0
WKUP_GPIO0_4 7 IO 0
MCU_BOOTMODE04 Bootstrap I 0
AD3 WKUP_GPIO0_5 WKUP_GPIO0_5 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_MCAN1_RX 1 I 1
MCU_SPI1_CS3 2 IO 1
MCU_ADC_EXT_TRIGGER1 3 I 0
WKUP_GPIO0_5 7 IO 0
AC2 WKUP_GPIO0_6 WKUP_GPIO0_6 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_UART0_CTSn 1 I 1
MCU_CPTS0_HW1TSPUSH 2 I 0
WKUP_GPIO0_6 7 IO 0
AC1 WKUP_GPIO0_7 WKUP_GPIO0_7 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
WKUP_UART0_RTSn 1 O
MCU_CPTS0_HW2TSPUSH 2 I 0
WKUP_GPIO0_7 7 IO 0
AC5 WKUP_GPIO0_8 WKUP_GPIO0_8 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_CPTS0_TS_SYNC 2 O
WKUP_GPIO0_8 7 IO 0
MCU_BOOTMODE08 Bootstrap I 0
AB4 WKUP_GPIO0_9 WKUP_GPIO0_9 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 1/1 Yes
MCU_CPTS0_TS_COMP 2 O
WKUP_GPIO0_9 7 IO 0
MCU_BOOTMODE09 Bootstrap I 0
AB3 WKUP_GPIO0_10 WKUP_GPIO0_10 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_EXT_REFCLK0 1 I 0
MCU_CPTS0_RFT_CLK 4 I 0
MCU_SYSCLKOUT0 5 O
WKUP_GPIO0_10 7 IO 0
AB2 WKUP_GPIO0_11 WKUP_GPIO0_11 0 IO OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 0 0/1 Yes
MCU_OBSCLK0 1 O
MCU_TIMER_IO1 4 IO 0
MCU_CLKOUT0 6 O
WKUP_GPIO0_11 7 IO 0
AC7 WKUP_I2C0_SCL WKUP_I2C0_SCL 0 IOD OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes I2C OPEN DRAIN 1 1/0 Yes
AD6 WKUP_I2C0_SDA WKUP_I2C0_SDA 0 IOD OFF 0 1.8 V/3.3 V VDDSHV0_WKUP Yes I2C OPEN DRAIN 1 1/0 Yes
AE4 WKUP_LFOSC0_XI WKUP_LFOSC0_XI I OFF 1.8 V VDDA_WKUP Analog No
AC4 WKUP_LFOSC0_XO WKUP_LFOSC0_XO O OFF 1.8 V VDDA_WKUP Analog No
AD5 WKUP_OSC0_XI WKUP_OSC0_XI I OFF 1.8 V VDDA_WKUP Analog No
AE6 WKUP_OSC0_XO WKUP_OSC0_XO O OFF 1.8 V VDDA_WKUP Analog No
AB1 WKUP_UART0_RXD WKUP_UART0_RXD 0 I OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1 0/1 Yes
WKUP_GPIO0_52 7 IO 0
AB5 WKUP_UART0_TXD WKUP_UART0_TXD 0 O OFF 7 1.8 V/3.3 V VDDSHV0_WKUP Yes LVCMOS PU/PD 1 0/1 Yes
WKUP_GPIO0_53 7 IO 0

The following list describes the table column headers:

  1. BALL NUMBER: Ball numbers on the bottom side associated with each signal on the bottom.
  2. BALL NAME: Mechanical name from package device (name is taken from muxmode 0).
  3. SIGNAL NAME: Names of signals multiplexed on each ball (also notice that the name of the ball is the signal name in muxmode 0).
    Note:

    Table 5-1, Pin Attributes, does not take into account the subsystem multiplexing signals. Subsystem multiplexing signals are described in Section 5.3, Signal Descriptions.

  4. MUXMODE: Multiplexing mode number:
    1. MUXMODE 0 is the primary muxmode. The primary muxmode is not necessarily the default muxmode.
      Note:

      The default muxmode is the mode at the release of the reset; also see the BALL RESET REL. MUXMODE column.

    2. MUXMODE 1 through 7 are possible muxmodes for alternate functions. On each pin, some muxmodes are effectively used for alternate functions, while some muxmodes are not used. Only MUXMODE values which correspond to defined functions should be used.
    3. Bootstrap are Special Configuration Pins, latched on rising edge of PORn / RESETFULLn. These are not programable MUXMODE.
    4. An empty box means Not Applicable.
  5. TYPE: This column describes functionality of the pin when configured for the given mux mode. It does not represent all capabilities of the pin, and as such, there may be other mux mode configurations where these pins operate as a push-pull driver:
    • I = Input
    • O = Output
    • IO = Input or Output
    • IOD = Open drain terminal - Input or Output
    • IOZ = Input, Output or Three-state terminal
    • OZ = Output or Three-state terminal
    • A = Analog
    • PWR = Power
    • GND = Ground
    • CAP = LDO Capacitor.
  6. BALL RESET STATE: The state of the terminal at power-on reset:
    • DRIVE 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated).
    • DRIVE 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated).
    • OFF: High-impedance
    • PD: High-impedance with an active pulldown resistor
    • PU: High-impedance with an active pullup resistor
    • An empty box means Not Applicable.
  7. BALL RESET REL. MUXMODE: This muxmode is automatically configured at the release of the rstoutn signal.
    An empty box means Not Applicable.
  8. I/O VOLTAGE VALUE: This column describes the IO voltage value (the corresponding power supply).
    An empty box means Not Applicable.
  9. POWER: The voltage supply that powers the terminal IO buffers.
    An empty box means Not Applicable.
  10. HYS: Indicates if the input buffer has hysteresis:
    • Yes: With hysteresis
    • No: Without hysteresis

      An empty box means No.

    For more information, see the hysteresis values in Section 6.6, Electrical Characteristics.

  11. BUFFER TYPE: This column describes the associated output buffer type

    An empty box means Not Applicable.

    For drive strength of the associated output buffer, refer to Section 6.6, Electrical Characteristics.

  12. PULL UP/DOWN TYPE: indicates the presence of an internal pullup or pulldown resistor. Pullup and pulldown resistors can be enabled or disabled via software.
    • PU: Internal pullup
    • PD: Internal pulldown
    • PU/PD: Internal pullup and pulldown
    • An empty box means No pull.
  13. DSIS: The deselected input state (DSIS) indicates the state driven on the peripheral input (logic "0", logic "1", or "PIN" level) when the peripheral pin function is not selected by any of the PINCNTLx registers.
    • 0: Logic 0 driven on the input signal port of the peripheral.
    • 1: Logic 1 driven on the input signal port of the peripheral.
    • An empty box means Not Applicable.
  14. RXACTIVE / TXDISABLE:This column indicates the default value of the RXACTIVE / TXDISABLE bits in the PADCONFIG register.
    • RXACTIVE: 0 = receiver disabled, 1 = receiver enabled.
    • TXDISABLE: 0 = driver enabled, 1 = driver disabled.
    • An empty box means Not Applicable.
  15. IO Daisy Chain:This column indicates which pins can be included in the daisy chain during low power modes.
    Note:

    Configuring two pins to the same input signal is not supported as it can yield unexpected results. This can be easily prevented with the proper software configuration (HiZ mode is not an input signal).

    Note:

    When a pad is set into a multiplexing mode which is not defined by pin multiplexing, that pad’s behavior is undefined. This should be avoided.