SBASAW1A September 2023 – December 2023 AMC21C12
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The AMC21C12 does not require any specific power-up sequencing. The high-side power supply (VDD1) is decoupled with a low-ESR, 100-nF capacitor (C1) parallel to a low-ESR, 1-µF capacitor (C2). The low-side power supply (VDD2) is equally decoupled with a low-ESR, 100-nF capacitor (C3) parallel to a low-ESR, 1-µF capacitor (C4). Place all four capacitors (C1, C2, C3, and C4) as close to the device as possible. Figure 7-6 shows a decoupling schematic for the AMC21C12.
For high VDD1 supply voltages (>5.5 V) place a 10-Ω resistor (R4) in series with the VDD1 power supply for additional filtering.
Capacitors must provide adequate effective capacitance under the applicable DC bias conditions experienced in the application. Multilayer ceramic capacitors (MLCCs) typically exhibit only a fraction of the nominal capacitance under real-world conditions and this factor must be taken into consideration when selecting these capacitors. This problem is especially acute in low-profile capacitors, in which the dielectric field strength is higher than in taller components. Reputable capacitor manufacturers provide capacitance versus DC bias curves that greatly simplify component selection.