SBASAC9B February   2022  – December 2024 AMC23C11

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information 
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications (Reinforced Isolation)
    7. 5.7  Safety-Related Certifications 
    8. 5.8  Safety Limiting Values 
    9. 5.9  Electrical Characteristics 
    10. 5.10 Switching Characteristics 
    11. 5.11 Timing Diagrams
    12. 5.12 Insulation Characteristics Curves
    13. 5.13 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Reference Input
      3. 6.3.3 Isolation Channel Signal Transmission
      4. 6.3.4 Open-Drain Digital Output
        1. 6.3.4.1 Transparent Output Mode
        2. 6.3.4.2 Latch Output Mode
      5. 6.3.5 Power-Up and Power-Down Behavior
      6. 6.3.6 VDD1 Brownout and Power-Loss Behavior
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 DC Link Overcurrent Detection
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
    3. 7.3 Application Curves
    4. 7.4 Best Design Practices
    5. 7.5 Power Supply Recommendations
    6. 7.6 Layout
      1. 7.6.1 Layout Guidelines
      2. 7.6.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The value of the shunt resistors (R10 and R20) in this example is 10mΩ. At the desired 30A overcurrent detection level, the voltage drop across the shunt resistor is 10mΩ × 30A = 300mV. The positive-going trip threshold of the comparator is VREF + VHYS, where VHYS is 4mV (as specified in the Electrical Characteristics table) and VREF is the voltage across R11 (R12, respectively) that is connected between the REF and GND1 pins. R11 and R12 are calculated as (VTRIP – VHYS) / IREF = (300mV – 4mV) / 100μA = 2.96kΩ. The next lower value from the E96 series (1% accuracy) is 2.94kΩ, resulting in an overcurrent trip threshold (rising) of 29.8A.

A 10Ω, 1nF RC filter (R15, C16 and R25, C26, respectively) is placed at the input of the comparator to filter the input signal and reduce noise sensitivity. This filter adds 10Ω × 1nF = 10ns of propagation delay that must be considered when calculating the overall response time of the protection circuit. Larger filter constants are preferable to increase noise immunity if the system can tolerate the additional delay.

Table 7-2 summarizes the key parameters of the design.

Table 7-2 Overcurrent Detection Design Example
PARAMETERVALUE
Reference resistor value (R11, R21)2.94kΩ
Reference capacitor value (C15, C25)100nF
Reference voltage296mV
Reference voltage settling time (to 90% of final value)690μs
Overcurrent trip threshold (rising)298mV / 29.8A
Overcurrent trip threshold (falling)294mV / 29.4A