SLUSF68 july   2023 BQ25173-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Power Up from Input Source
        1. 7.3.1.1 ISET Pin Detection
      2. 7.3.2 Supercapacitor Regulation Voltage
      3. 7.3.3 Supercapacitor Charging Profile
      4. 7.3.4 Status Outputs (PG, STAT)
        1. 7.3.4.1 Power Good Indicator (PG Pin)
        2. 7.3.4.2 Charging Status Indicator (STAT)
      5. 7.3.5 Protection Features
        1. 7.3.5.1 Input Overvoltage Protection (VIN OVP)
        2. 7.3.5.2 Output Overcurrent Protection (OUT OCP)
        3. 7.3.5.3 Thermal Regulation and Thermal Shutdown (TREG and TSHUT)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown or Undervoltage Lockout (UVLO)
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Standby Mode
      4. 7.4.4 Fault Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1s Supercapacitor Charger Design Example
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 4s Supercapacitor Charger Design Example
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.3 Thermal Considerations

The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is:

Equation 3. θJA = (TJ – T) / P

Where:

TJ = chip junction temperature
T = ambient temperature
P = device power dissipation

Factors that can influence the measurement and calculation of θJA include:

  • Whether or not the device is board mounted
  • Trace size, composition, thickness, and geometry
  • Orientation of the device (horizontal or vertical)
  • Volume of the ambient air surrounding the device under test and airflow
  • Whether other surfaces are in close proximity to the device being tested

Due to the charge profile of supercapacitors, maximum power dissipation is typically seen at the beginning of the charge cycle when the voltage is at its lowest.

Device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. P can be calculated from the following equation during charging:

Equation 4. P = [V(IN) – V(OUT)] × I(OUT)

The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active.