SLUSF69 May 2024 BQ25186
ADVANCE INFORMATION
Refer to the PDF data sheet for device specific package drawings
The device contains an open-drain output that signals its status and is valid only after the device has completed start-up into a valid state. If the part starts into a fault, interrupts will not be sent.
The /INT pin is normally in high impedance and is pulled low for 128 μs when an interrupt condition occurs. When a fault or status change occurs or any other condition that generates an interrupt, a 128-μs pulse (/INT pin pulled down) is sent on /INT to notify the host.
Interrupts can be masked through I2C. If the interrupt condition occurs while the interrupt is masked an interrupt pulse will not be sent. If the interrupt is unmasked while the fault condition is still present, an interrupt pulse will not be sent until the /INT trigger condition occurs while unmasked. Below are a list of interrupts that can be masked through I2C.
MASK BIT | ACTION |
---|---|
ILIM_INT_MASK | Do not issue an /INT pulse when ILIM limiting occurs |
VINDPM_INT_MASK | Do not issue an /INT pulse when VINDPM is active |
TS_INT_MASK | Do not issue an /INT pulse when any of the TS events have occured. |
TREG_INT_MASK | Do not issue an /INT pulse when TREG is actively reducing the current |
BAT_INT_MASK | Do not issue an /INT pulse when BATOCP or BUVLO event is triggered |
CHG_STATUS_INT_MASK | Do not send an interrupt anytime there is a charging status change. |