SLUSEG2C September 2022 – February 2024 BQ25620 , BQ25622
PRODUCTION DATA
In many applications, the host does not continually poll the charger status registers. Instead, the INT pin may be used to notify the host of a status change with a 256-μs INT pulse. Upon receiving the interrupt pulse, the host may read the flag registers (Charger_Flag_X and FAULT_Flag_X) to determine the event that caused the interrupt, and for each flagged event, read the corresponding status registers (Charger_Status_X and FAULT_Status_X) to determine the current state. Once set to 1, the flag bits remain latched at 1 until they are read by the host, which clears them. The status bits, however, are updated whenever there is a change to status and always represent the current state of the system.
All of the INT events can be masked off to prevent INT pulses from being sent out when they occur, with the exception of the initial power-up interrupt. Interrupt events are masked by setting their mask bit in registers (Charger_Mask_X and FAULT_Mask_X). Events always cause the corresponding flag bit to be set to 1, regardless of whether or not the interrupt pulse has been masked.