SLVSDU0B September 2017 – September 2019 BQ25910
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
QUIESCENT CURRENTS | ||||||
IBAT | Battery discharge current (BATP, BATN, SW) | VBAT = 4.5V, VBUS = 0 - 5V, SCL, SDA = 0V or 1.8V, TJ < 85°C, EN_CHG = 0 | 6.5 | 10 | μA | |
IVBUS_HIZ | Input supply current (VBUS) in HIZ | VBUS = 5V, High-Z Mode, no battery | 30 | μA | ||
VBUS < VVBUS_OV, High-Z Mode, no battery | 50 | μA | ||||
IVBUS | Input supply current (VBUS) | VBUS > VSLEEPZ, VBAT = 3.8V, ICHG = 0A, converter not switching | 20 | μA | ||
VBUS > VSLEEPZ, VBAT = 3.8V, converter switching, IOUT = 0A | 13 | mA | ||||
VBUS / VBAT POWER UP | ||||||
VVBUS_OP | VBUS operating range | 3.9 | 14 | V | ||
VVBUS_UVLOZ | VBUS rising for active I2C, no battery | VBUS rising | 3.6 | V | ||
VSLEEP | Enter sleep mode threshold | VBUS falling, VBUS - VBAT,
VBAT = 4V, TJ = 0°C - 85°C |
15 | 60 | 110 | mV |
VSLEEPZ | Exit sleep mode threshold | VBUS rising, VBUS - VBAT,
VBAT = 4V, TJ = 0°C - 85°C |
115 | 220 | 275 | mV |
VVBUS_OV | VBUS over-voltage rising threshold | VBUS rising | 14 | 14.3 | 14.7 | V |
VBUS over-voltage falling threshold | VBUS falling | 13.3 | 13.65 | 14 | V | |
VBAT_UVLOZ | Battery for active I2C, no VBUS | 2.3 | V | |||
VPOORSRC | Bad adapter detection threshold | 3.7 | V | |||
IPOORSRC | Bad adapter detection current source | 20 | mA | |||
POWER-PATH | ||||||
RON_QBLK (QBLK) | Top reverse blocking MOSFET on-resistance between VBUS and PMID (QBLK) | TJ = –40°C - 125°C | 14 | 22 | mΩ | |
RON_QHSA (Q1) | Outer, high-side switching MOSFET on-resistance between PMID and CFLY+ (Q1) | TJ = –40°C - 125°C | 22 | 40 | mΩ | |
RON_QHSB (Q3) | Inner, high-side switching MOSFET on-resistance between CFLY+ and SW (Q3) | TJ = –40°C - 125°C | 12 | 20 | mΩ | |
RON_QLSB (Q4) | Inner, low-side switching MOSFET on-resistance between SW and CFLY- (Q4) | TJ = –40°C - 125°C | 8 | 13 | mΩ | |
RON_QLSA (Q2) | Outer, low-side switching MOSFET on-resistance between CFLY- and GND (Q2) | TJ = –40°C - 125°C | 8 | 13 | mΩ | |
BATTERY CHARGER | ||||||
VREG_RANGE | Typical charge voltage regulation range | 3.5 | 4.775 | V | ||
VREG_STEP | Typical charge voltage regulation step | 5 | mV | |||
VREG_ACC | Charge voltage regulation accuracy | VREG = 4.2V or 4.35V or 4.4V,
TJ = –40°C - 85°C |
-0.4 | 0.4 | % | |
ICHG_RANGE | Typical charge current regulation range | 1000 | 6000 | mA | ||
ICHG_STEP | Typical charge current regulation step | 50 | mA | |||
ICHG_ACC | Charge current regulation accuracy | ICHG = 2A, 3A, 4A, 5A, 6A,
TJ = –40°C - 85°C |
-10 | 10 | % | |
ITERM_ACC | Termination current regulation accuracy | VBUS = 9V, ICHG = 4A, ITERM = 1.0A,
TJ = 0°C - 85°C |
0.9 | 1 | 1.1 | A |
VBAT_SHORT | Short battery voltage falling threshold | VBAT falling | 1.85 | 2.00 | 2.15 | V |
VBAT_LOWV | VBAT LOWV Rising threshold to start fast-charging | VBAT rising, VBATLOW = 3.2V | 3.1 | 3.2 | 3.3 | V |
VBAT LOWV Falling threshold to stop fast-charging | VBAT falling, VBATLOW = 3.2V | 2.9 | 3 | 3.1 | V | |
VBAT_LOWV | VBAT LOWV Rising threshold to start fast-charging | VBAT rising, VBATLOW = 3.5V | 3.4 | 3.5 | 3.6 | V |
VBAT LOWV Falling threshold to stop fast-charging | VBAT falling, VBATLOW = 3.5V | 3.2 | 3.3 | 3.4 | V | |
RBATP | BATP Input resistance | VBAT = 4V, VBUS = 5V, EN_CHG = 0 | 0.6 | MΩ | ||
RBATN | BATN Input resistance | VBAT = 4V, VBUS = 5V, EN_CHG = 0 | 0.6 | MΩ | ||
INPUT VOLTAGE / CURRENT REGULATION | ||||||
VINDPM_RANGE | Input voltage regulation range | 3.9 | 14 | V | ||
VINDPM_STEP | Input voltage regulation step | 100 | mV | |||
VINDPM_ACC | Input voltage regulation accuracy | VINDPM = 4.3V | 4.121 | 4.3 | 4.447 | V |
VINDPM = 7.8V | 7.566 | 7.8 | 8.034 | V | ||
VINDPM = 10.8V | 10.476 | 10.8 | 11.124 | V | ||
IINDPM_RANGE | Input current regulation range | 500 | 3600 | mA | ||
IINDPM_STEP | Input current regulation step | 100 | mA | |||
IINDPM_ACC | Input current regulation accuracy | IINDPM = 500mA, TJ = –40°C - 85°C | 410 | 500 | mA | |
IINDPM = 1500mA, TJ = –40°C - 85°C | 1275 | 1500 | mA | |||
IINDPM = 2500mA, TJ = –40°C - 85°C | 2125 | 2500 | mA | |||
IINDPM = 3000mA, TJ = –40°C - 85°C | 2540 | 3000 | mA | |||
BATTERY OVER-VOLTAGE PROTECTION | ||||||
VBAT_OVP | Battery over-voltage rising threshold | VBAT rising, as percentage of VREG | 102 | 104 | 106 | % |
Battery over-voltage falling threshold | VBAT falling, as percentage of VREG | 100 | 102 | 103 | % | |
THERMAL REGULATION AND THERMAL SHUTDOWN | ||||||
TREG | Junction temperature regulation accuracy | TREG = 80°C | 80 | °C | ||
TREG = 120°C | 120 | °C | ||||
TSHUT | Thermal Shutdown Rising threshold | Temperature Increasing | 150 | °C | ||
Thermal Shutdown Falling threshold | Temperature Decreasing | 120 | °C | |||
BUCK MODE OPERATION | ||||||
FSW | PWM switching frequency | Switching-node frequency | 1.35 | 1.5 | 1.65 | MHz |
DMAX | Maximum PWM Duty Cycle | 97 | % | |||
REGN LDO | ||||||
VREGN | REGN LDO output voltage | VVBUS = 12V, IREGN = 40mA | 4.85 | 5 | V | |
VVBUS = 5V, IREGN = 20mA | 4.7 | 4.8 | V | |||
IREGN | REGN LDO current limit | VVBUS = 5V, VREGN = 3.8V | 50 | mA | ||
I2C INTERFACE (SCL, SDA) | ||||||
VIH | Input high threshold level, SDA and SCL | Pull-up rail 1.8V | 1.3 | V | ||
VIL | Input low threshold level, SDA and SCL | Pull-up rail 1.8V | 0.4 | V | ||
VOL | Output low threshold level, SDA | Sink current = 5mA | 0.4 | V | ||
IBIAS | High level leakage current, SDA and SCL | Pull-up rail 1.8V | 1 | μA | ||
LOGIC OUTPUT PIN (/INT) | ||||||
VOL | Output low threshold level | Sink current = 5mA | 0.4 | V | ||
IOUT_BIAS | High level leakage current | Pull-up rail 1.8V | 1 | μA |