SLVSDU0B September 2017 – September 2019 BQ25910
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
REG09 is shown in Figure 40 and described in Table 14.
Return to Summary Table.
All bits in REG09 are automatically cleared after a read.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PG_FLAG | INDPM_FLAG | VINDPM_FLAG | TREG_FLAG | WD_FLAG | CHRG_TERM_FLAG | RESERVED | CHRG_FLAG |
R-0h | R-0h | R-0h | R-0h | R-0h | R-0h | R-0h | R-0h |
Bit | Field | Type | Reset by REG_RST | Reset by WATCHDOG | Description |
---|---|---|---|---|---|
7 | PG_FLAG | R | Yes | No |
Power-good INT flag 0h = Normal 1h = PG-signal toggle detected |
6 | INDPM_FLAG | R | Yes | No |
INDPM-regulation INT flag 0h = Normal 1h = INDPM-signal rising edge detected |
5 | VINDPM_FLAG | R | Yes | No |
VINDPM-regulation INT flag 0h = Normal 1h = VINDPM-signal rising edge detected |
4 | TREG_FLAG | R | Yes | No |
Device temperature-regulation INT flag 0h = Normal 1h = TREG-signal rising edge detected |
3 | WD_FLAG | R | Yes | No |
I2C-watchdog INT flag 0h = Normal 1h = WD_STAT-signal rising edge detected |
2 | CHRG_TERM_FLAG | R | Yes | No |
Charger-termination INT flag 0h = Normal 1h = Charger-termination signal rising edge detected |
1 | RESERVED | R | Yes | No |
Reserved bit always reads 0 |
0 | CHRG_FLAG | R | Yes | No |
Charger status INT flag 0h = Normal 1h = CHRG_STAT[2:0] bits changed (transition to any state) |