SLUSFJ0A June   2024  – September 2024 BQ51013C-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Details of a Qi Wireless Power System and BQ51013C-Q1 Power Transfer Flow Diagrams
      2. 8.3.2  Dynamic Rectifier Control
      3. 8.3.3  Dynamic Efficiency Scaling
      4. 8.3.4  RILIM Calculations
      5. 8.3.5  Input Overvoltage
      6. 8.3.6  Adapter Enable Functionality and EN1/EN2 Control
      7. 8.3.7  End Power Transfer Packet (WPC Header 0x02)
      8. 8.3.8  Status Outputs
      9. 8.3.9  WPC Communication Scheme
      10. 8.3.10 Communication Modulator
      11. 8.3.11 Adaptive Communication Limit
      12. 8.3.12 Synchronous Rectification
      13. 8.3.13 Temperature Sense Resistor Network (TS)
      14. 8.3.14 3-State Driver Recommendations for the TS/CTRL Pin
      15. 8.3.15 Thermal Protection
      16. 8.3.16 WPC v2.0 Compliance – Foreign Object Detection
      17. 8.3.17 Receiver Coil Load-Line Analysis
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 BQ51013C-Q1 Wireless Power Receiver Used as a Power Supply
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Using The BQ51013C-Q1 as a Wireless Power Supply: (See Figure 1-1 )
          2. 9.2.1.2.2 Series and Parallel Resonant Capacitor Selection
          3. 9.2.1.2.3 Recommended RX Coils
          4. 9.2.1.2.4 COMM, CLAMP, and BOOT Capacitors
          5. 9.2.1.2.5 Control Pins and CHG
          6. 9.2.1.2.6 Current Limit and FOD
          7. 9.2.1.2.7 RECT and OUT Capacitance
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Dual Power Path: Wireless Power and DC Input
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Wireless and Direct Charging of a Li-Ion Battery at 800 mA
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHL|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

over operating free-air temperature range, –40°C to 125°C (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VUVLOUndervoltage lockoutVRECT: 0 V → 3 V2.52.72.8V
VHYS-UVLOHysteresis on UVLOVRECT: 3 V → 2 V

0.25

V
VRECT-OVPInput overvoltage thresholdVRECT: 5 V → 16 V14.51515.5V
VHYS-OVPHysteresis on OVPVRECT: 16 V → 5 V

0.15

V
VRECT-Th1Dynamic VRECT Threshold 1ILOAD < 0.1 x IIMAX (ILOAD rising)7.08V
VRECT-Th2Dynamic VRECT Threshold 20.1 x IIMAX < ILOAD < 0.2 x IIMAX
(ILOAD rising)		6.28V
VRECT-Th3Dynamic VRECT Threshold 30.2 x IIMAX < ILOAD < 0.4 x IIMAX
(ILOAD rising)		5.53V
VRECT-Th4Dynamic VRECT Threshold 4ILOAD > 0.4 x IIMAX (ILOAD rising)5.11V
VRECT-DPMRectifier undervoltage protection, restricts IOUT at VRECT-DPM33.13.2V
VRECT-REVRectifier reverse voltage protection at the outputVRECT-REV = VOUT - VRECT,
VOUT = 10 V

7

89V
QUIESCENT CURRENT
IRECTActive chip quiescent current consumption from RECTILOAD = 0 mA, 0°C ≤ TJ ≤ 85°C810mA
ILOAD = 300 mA,
0°C ≤ TJ ≤ 85°C		23mA
IOUTQuiescent current at the output when wireless power is disabled (Standby)VOUT = 5 V, 0°C ≤ TJ ≤ 85°C2035µA
ILIM SHORT CIRCUIT
RILIM-SHORTHighest value of ILIM resistance to ground (RILIM) considered a fault (short). Monitored for IOUT > 100 mARILIM: 200 Ω → 50 Ω. IOUT latches off, cycle power to reset120Ω
tDGL-ShortDeglitch time transition from ILIM short to IOUT disable1ms
IILIM_SHORT,OKILIM-SHORT,OK enables the ILIM short comparator when IOUT is greater than this valueILOAD: 0 mA → 200 mA116145165mA
IILIM_SHORT,OK HYSTHysteresis for ILIM-SHORT,OK comparatorILOAD: 0 mA → 200 mA30mA
IOUTMaximum output current limit, CLMaximum ILOAD that will be delivered for 1 ms when ILIM is shorted

2450

mA
OUTPUT
VOUT-REGRegulated output voltageILOAD = 1000 mA4.925.005.04V
ILOAD = 10 mA4.945.015.06
KILIMCurrent programming factor for hardware protectionRILIM = KILIM / IILIM, where IILIM is the hardware current limit.
IOUT = 1 A

285

314321AΩ
KIMAXCurrent programming factor for the nominal operating currentIIMAX = KIMAX / RILIM where IMAX is the maximum normal operating current.
IOUT = 1 A		262AΩ
IOUTCurrent limit programming range1500mA
ICOMMCurrent limit during WPC communicationIOUT > 300 mA

Iout + 50

mA
IOUT < 300 mA

320

380

440

mA
tHOLDHold off time for the communication current limit during start-up1s
TS / CTRL FUNCTIONALITY
VTS-BiasInternal TS Bias Voltage (VTS is the voltage at the TS/CTRL pin, VTS-Bias is thet internal bias voltage)ITS-Bias < 100 µA (periodically driven see tTS/CTRL)22.22.4V
VCOLDRising thresholdVTS-Bias: 50% → 60%56.558.760.8%VTS-Bias
VCOLD-HystFalling hysteresisVTS-Bias: 60% → 50%2%VTS-Bias
VHOTFalling thresholdVTS-Bias: 20% → 15%18.519.620.7%VTS-Bias
VHOT-HystRising hysteresisVTS-Bias: 15% → 20%3%VTS-Bias
VCTRL-HighVoltage on CTRL pin for a high0.25V
VCTRL-LowVoltage on CTRL pin for a low00.05mV
tTS/CTRL-MeasTime period of TS/CTRL measurements (when VTS-Bias is being driven internally)Synchronous to the communication period24ms
tTS-DeglitchDeglitch time for all TS comparators10ms
RTSPullup resistor for the NTC network. Pulled up to VTB-Bias182022kΩ
THERMAL PROTECTION
TJ-SDThermal shutdown temperature155°C
TJ-HysThermal shutdown hysteresis20°C
OUTPUT LOGIC LEVELS ON CHG
VOLOpen-drain CHG pinISINK = 5 mA500mV
IOFFCHG leakage current when disabledV CHG = 20 V1µA
COMM PIN
RDS(ON)COMM1 and COMM2VRECT = 2.6 V1.5Ω
IOFFCOMMx pin leakage currentVCOMM1 = 20 V, VCOMM2 = 20 V1µA
CLAMP PIN
RDS(ON)CLAMP1 and CLAMP20.8Ω
ADAPTER ENABLE
VAD-PresVAD Rising threshold voltageVAD 0 V → 5 V3.53.63.8V
VAD-PresHVAD hysteresisVAD 5 V → 0 V400mV
IADInput leakage currentVRECT = 0 V, VAD = 5 V60μA
RADPullup resistance from AD-EN to OUT when adapter mode is disabled and VOUT > VAD, EN-OUTVAD = 0 V, VOUT = 5 V200350Ω
VAD-DiffVoltage difference between VAD and V AD-EN when adapter mode is enabledVAD = 5 V, 0°C ≤ TJ ≤ 85°C34.55V
SYNCHRONOUS RECTIFIER
IOUT-SRIOUT at which the synchronous rectifier enters half-synchronous mode, SYNC_ENILOAD 200 mA → 0 mA80100135mA
IOUT-SRHHysteresis for IOUT,SR (full-synchronous mode enabled)ILOAD 0 mA → 200 mA30mA
VHS-DIODEHigh-side diode drop when the rectifier is in half-synchronous modeIAC-VRECT = 250 mA and
TJ = 25°C		0.7V
EN1 AND EN2
VILInput low threshold for EN1 and EN20.4V
VIHInput high threshold for EN1 and EN21.3V
RPDEN1 and EN2 pulldown resistance200kΩ
ADC (WPC RELATED MEASUREMENTS AND COEFFICIENTS)
IOUT SENSEAccuracy of the current sense over the load rangeIOUT = 750 mA - 1000 mA–1.5%0%0.9%