SLUSFJ0A June   2024  – September 2024 BQ51013C-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Details of a Qi Wireless Power System and BQ51013C-Q1 Power Transfer Flow Diagrams
      2. 8.3.2  Dynamic Rectifier Control
      3. 8.3.3  Dynamic Efficiency Scaling
      4. 8.3.4  RILIM Calculations
      5. 8.3.5  Input Overvoltage
      6. 8.3.6  Adapter Enable Functionality and EN1/EN2 Control
      7. 8.3.7  End Power Transfer Packet (WPC Header 0x02)
      8. 8.3.8  Status Outputs
      9. 8.3.9  WPC Communication Scheme
      10. 8.3.10 Communication Modulator
      11. 8.3.11 Adaptive Communication Limit
      12. 8.3.12 Synchronous Rectification
      13. 8.3.13 Temperature Sense Resistor Network (TS)
      14. 8.3.14 3-State Driver Recommendations for the TS/CTRL Pin
      15. 8.3.15 Thermal Protection
      16. 8.3.16 WPC v2.0 Compliance – Foreign Object Detection
      17. 8.3.17 Receiver Coil Load-Line Analysis
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 BQ51013C-Q1 Wireless Power Receiver Used as a Power Supply
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Using The BQ51013C-Q1 as a Wireless Power Supply: (See Figure 1-1 )
          2. 9.2.1.2.2 Series and Parallel Resonant Capacitor Selection
          3. 9.2.1.2.3 Recommended RX Coils
          4. 9.2.1.2.4 COMM, CLAMP, and BOOT Capacitors
          5. 9.2.1.2.5 Control Pins and CHG
          6. 9.2.1.2.6 Current Limit and FOD
          7. 9.2.1.2.7 RECT and OUT Capacitance
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Dual Power Path: Wireless Power and DC Input
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Wireless and Direct Charging of a Li-Ion Battery at 800 mA
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHL|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

  • Keep the trace resistance as low as possible on AC1, AC2, and BAT.
  • Detection and resonant capacitors must be as close to the device as possible.
  • COMM, CLAMP, and BOOT capacitors must be placed as close to the device as possible.
  • Via interconnect on PGND net is critical for appropriate signal integrity and proper thermal performance.
  • High frequency bypass capacitors must be placed close to RECT and OUT pins.
  • ILIM and FOD resistors are important signal paths and the loops in those paths to PGND must be minimized.

    Signal and sensing traces are the most sensitive to noise; the sensing signal amplitudes are usually measured in mV, which is comparable to the noise amplitude. Make sure that these traces are not being interfered by the noisy and power traces. AC1, AC2, BOOT1, BOOT2, COMM1, and COMM2 are the main source of noise in the board. These traces should be shielded from other components in the board. It is usually preferred to have a ground copper area placed underneath these traces to provide additional shielding. Also, make sure they do not interfere with the signal and sensing traces. The PCB should have a ground plane (return) connected directly to the return of all components through vias (two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal components).

    For a 1-A fast charge current application, the current rating for each net is as follows:

    • AC1 = AC2 = 1.2 A
    • OUT = 1 A
    • RECT = 100 mA (RMS)
    • COMMx = 300 mA
    • CLAMPx = 500 mA
    • All others can be rated for 10 mA or less

For the RHL package, the thermal pad should be connected to ground to help dissipate heat.