SBOS998C June   2021  – March 2022 BUF802

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Wide Bandwidth Mode
    6. 6.6 Electrical Characteristics: Low Quiescent Current Mode
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and Output Over-Voltage Clamp
      2. 8.3.2 Adjustable Quiescent Current
      3. 8.3.3 ESD Structure
    4. 8.4 Device Functional Modes
      1. 8.4.1 Buffer Mode (BF Mode)
      2. 8.4.2 Composite Loop Mode (CL Mode)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Oscilloscope Front-End Amplifier Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Transforming a Wide-Bandwidth, 50 Ω Input Signal Chain to High-Input Impedance
        1. 9.2.2.1 Detailed Design Results
        2. 9.2.2.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

The BUF802 is intended to operate with supplies ranging from ±4.5 V to ±6.5 V. The BUF802 can operate on either single-sided supplies or split supplies. When using split supplies, the supplies may be symmetrically balanced around GND or asymmetric. For best AC performance, the input and output signal should be centered around the mid-supply.

Minimize the distance between the power-supply pins and decoupling capacitors. The high frequency capacitors (< 0.1 µF) should be placed close to the supply-pins on the same side of the PCB as the BUF802. Larger capacitors (> 1 µF) can be placed further away from the device. Section 11 has additional details on decoupling capacitor layout and routing.

The BUF802 has two sets of supply pins: VS+ and VS-; VSO+ and VSO-. The separation of the input and output stage supply pins minimize spurious cross-talk and maximizes transient decoupling between the two stages. Figure 8-1 shows how both sets of supply pins are internally connected through back-to-back diodes. It is therefore imperative that the supply pins for the input and output stages are connected to the same potential. As shown in Section 11, maintain separate and individual decoupling capacitors for all the supply pins.