SCHS047N August   1998  – February 2025 CD4051B , CD4052B , CD4053B

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AC Performance Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

Over operating free-air temperature range, VSUPPLY = ±5V, and RL = 100Ω, (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SIGNAL INPUTS (VIS) AND OUTPUTS (VOS)
VIS (V) VEE (V) VSS (V) VDD (V) TEMP

Quiescent Device Current, IDD Max
 
0V 0V 5V –55°C 60 µA
–40°C 60
25°C 17 60
85°C 150
125°C 150
0V 0V 10V –55°C 60
–40°C 60
25°C 18 60
85°C 300
125°C 300
0V 0V 15V  –55°C 60
–40°C 60
25°C 18 60
85°C 600
125°C 600
0V 0V 20V –55°C 100
–40°C 100
25°C 18 100
85°C 3000
125°C 3000
Drain to Source ON Resistance rON Max
0 ≤ VIS ≤ VDD
0V 0V 5V –55°C 800 Ω
–40°C 850
25°C 470 1050
85°C 1200
125°C 1300
0V 0V 10V –55°C 310
–40°C 300
25°C 180 400
85°C 520
125°C 550
0V 0 15V –55°C 200
–40°C 210
25°C 125 240
85°C 300
125°C 300
Change in ON Resistance
(Between Any Two Channels),
ΔRON
0V 0V 5V 25°C 15 Ω
0V 0V 10V 10
0V 0V 15V 5
OFF Channel Leakage Current: Any Channel OFF (Max)
or ALL Channels OFF (COMMON OUT/IN) (Max)
0V 0V 18V  –55°C ± 100 nA
–40°C ± 100
25°C ± 0.3 ± 100(2)
85°C ± 1000(2)
125°C ± 1000(2)
ON Channel Leakage Current: Any Channel ON (Max) or
ALL Channels ON (COMMON OUT/IN) (Max)
5 or 0 –5V 0V 10.5V 85°C ± 300 nA
5 0V 0V 18V 85°C ± 300
Capacitance Input, CIS 0V 0V 10V 25°C 5 pF
Output, COS CD4051 30
Output, COS CD4052 18
Output, COS CD4053 9
Feed through, CIOS 0.2
Prop Delay VDD RL = 200kΩ 5V 25°C 30 60 ns
CL = 50pF 10V 15 30
tr, tf = 20ns 15V 10 20
CONTROL (ADDRESS OR INHIBIT), V
Input Low Voltage, VIL, Max 5V –55°C 0.8 V
–40°C 0.8
25°C 0.8
85°C 0.8
125°C 0.8
10V –55°C 0.8
–40°C 0.8
25°C 0.8
85°C 0.8
125°C 0.8
15V –55°C 0.8
–40°C 0.8
25°C 0.8
85°C 0.8
125°C 0.8
Input High Voltage, VIH, Min 5V –55°C 3.5 V
–40°C 3.5
25°C 3.5
85°C 3.5
125°C 3.5
10V –55°C 7
–40°C 7
25°C 7
85°C 7
125°C 7
15V –55°C 11
–40°C 11
25°C 11
85°C 11
125°C 11
Input current, IIN (Max) VIN = 0, 18 18V –55°C ±1 µA
–40°C ±1
25°C ±0.6 ±1
85°C ±1
125°C ±1
Propagation Delay Time Address-to-Signal OUT (Channels ON or OFF) (See Figure 10, Figure 11, and Figure 15) tr , tf = 20ns,
CL = 50pF,
RL = 10kΩ
0V 0V 5V 450 720 ns
0V 0V 10V 160 320
0V 0V 15V 120 240
–5V 0V 5V 225 450
Propagation Delay Time Inhibit-to-Signal OUT (Channel Turning ON) (See Figure 11) tr , tf = 20ns,
CL = 50pF,
RL = 1kΩ
0V 0V 5V 400 720 ns
0V 0V 10V 160 320
0V 0V 15V 120 240
–10V 0V 5V 200 400
Propagation Delay Time Inhibit-to-Signal OUT (Channel Turning OFF) (See Figure 17) tr , tf = 20ns,
CL = 50pF,
RL = 10kΩ
0V 0V 5V 200 450 ns
0V 0V 10V 90 210
0V 0V 15V 70 160
–10V 0V 5V 130 300
Input Capacitance, CIN (Any Address or Inhibit Input) –5V 0V 5V 25°C 5 7.5 pF
Peak-to-Peak voltage symmetrical about (VDD – VEE) / 2.
Determined by minimum feasible leakage measurement for automatic testing.