SCHS402 August   2019  – June 2021 CD54HCT14 , CD74HCT14

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Switching Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 TTL-Compatible Schmitt-Trigger CMOS Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Electrical Characteristics

over operating free-air temperature range; typical values measured at TA = 25°C (unless otherwise noted).
PARAMETERTEST CONDITIONSVCCOperating free-air temperature (TA)UNIT
25°C–40°C to 85°C–55°C to 125°C
MINTYPMAXMINTYPMAXMINTYPMAX
VT+Positive switching threshold4.5 V1.21.91.21.91.21.9
V
 
5.5 V1.42.11.42.11.42.1
VT-Negative switching threshold4.5 V0.51.20.51.20.51.2
V

5.5 V0.61.40.61.40.61.4
ΔVTHysteresis (VT+ - VT-)4.5 V0.41.40.41.40.41.4
V

5.5 V0.41.50.41.50.41.5
VOH High-level output voltageVI = VIH or VILIOH = –20 µA4.5 V4.44.44.4V
IOH = –4 mA4.5 V3.983.843.7
VOL Low-level output voltageVI = VIH or VILIOL = 20 µA4.5 V0.10.10.1V
IOL = 4 mA4.5 V0.260.330.4
IIInput leakage currentVI = VCC and GNDIO = 05.5 V±0.1±1±1µA
ICCSupply currentVI = VCC or GNDIO = 0
5.5 V

22040µA
ΔICC(1)Additional Quiescent Device Current Per Input Pin.VI = VCC – 2.14.5 V to 5.5 V360450490µA
CiInput capacitance5 V101010pF
(1) For dual-supply systems theoretical worst case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA.