SCHS183E November   1998  – October 2022 CD54HC374 , CD54HC574 , CD54HCT374 , CD54HCT574 , CD74HC374 , CD74HC574 , CD74HCT374 , CD74HCT574

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

The ’HC374, ’HCT374, ’HC574, and ’HCT574 are octal D-type flip-flops with 3-state outputs and the capability to drive 15 LSTTL loads. The eight edge-triggered flip-flops enter data into their registers on the LOW to HIGH transition of clock (CP). The output enable (OE) controls the 3-state outputs and is independent of the register operation. When OE is HIGH, the outputs are in the high-impedance state. The 374 and 574 are identical in function and differ only in their pinout arrangements.

Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD54HC374F3A CDIP (20) 26.92 mm × 6.92 mm
CD54HC574F CDIP (20) 26.92 mm × 6.92 mm
CD54HCT374F3A CDIP (20) 26.92 mm × 6.92 mm
CD54HCT574F CDIP (20) 26.92 mm × 6.92 mm
CD74HC374M SOIC (20) 12.80 mm × 7.50 mm
CD74HC574M SOIC (20) 12.80 mm × 7.50 mm
CD74HCT374M SOIC (20) 12.80 mm × 7.50 mm
CD74HCT574M SOIC (20) 12.80 mm × 7.50 mm
CD74HC374E PDIP (20) 25.40 mm × 6.35 mm
CD74HC574E PDIP (20) 25.40 mm × 6.35 mm
CD74HCT374E PDIP (20) 25.40 mm × 6.35 mm
CD74HCT574E PDIP (20) 25.40 mm × 6.35 mm
CD74HCT574PWR TSSOP (20) 6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20210902-SS0I-TWZG-7DLK-PFRHZPNL2RFN-low.pngFunctional Diagram