SCAS847I
July 2007 – October 2016
CDCE925
,
CDCEL925
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
EEPROM Specification
7.7
Timing Requirements: CLK_IN
7.8
Timing Requirements: SDA/SCL
7.9
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Control Terminal Setting
9.3.2
Default Device Setting
9.3.3
SDA/SCL Serial Interface
9.3.4
Data Protocol
9.4
Device Functional Modes
9.4.1
SDA/SCL Hardware Interface
9.5
Programming
9.6
Register Maps
9.6.1
SDA/SCL Configuration Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Spread Spectrum Clock (SSC)
10.2.2.2
PLL Multiplier/Divider Definition
10.2.2.3
Crystal Oscillator Start-Up
10.2.2.4
Frequency Adjustment With Crystal Oscillator Pulling
10.2.2.5
Unused Inputs and Outputs
10.2.2.6
Switching Between XO and VCXO Mode
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.1.2
Development Support
13.2
Documentation Support
13.2.1
Related Documentation
13.3
Related Links
13.4
Receiving Notification of Documentation Updates
13.5
Community Resources
13.6
Trademarks
13.7
Electrostatic Discharge Caution
13.8
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scas847i_oa
scas847i_pm
8
Parameter Measurement Information
Figure 4.
Test Load
Figure 5.
Test Load for 50-Ω Board Environment