Product details

Function Clock synthesizer Number of outputs 5 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 1.8 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 85 Features Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Catalog
Function Clock synthesizer Number of outputs 5 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 1.8 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 85 Features Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Catalog
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Member of Programmable Clock Generator Family
    • CDCEx913: 1-PLL, 3 Outputs
    • CDCEx925: 2-PLL, 5 Outputs
    • CDCEx925: 3-PLL, 7 Outputs
    • CDCEx949: 4-PLL, 9 Outputs
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Settings
  • Flexible Input Clocking Concept
    • External Crystal: 8 MHz to 32 MHz
    • On-Chip VCXO: Pull Range ±150 ppm
    • Single-Ended LVCMOS Up to 160 MHz
  • Free Selectable Output Frequency Up to 230  MHz
  • Low-Noise PLL Core
    • PLL Loop Filter Components Integrated
    • Low Period Jitter (Typical 60 ps)
  • Separate Output Supply Pins
    • CDCE925: 3.3 V and 2.5 V
    • CDCEL925: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable, or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Power Supply
  • Wide Temperature Range: –40°C to 85°C
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
  • APPLICATIONS
    • D-TVs, STBs, IP-STBs, DVD Players, DVD Recorders, and Printers

All other trademarks are the property of their respective owners

  • Member of Programmable Clock Generator Family
    • CDCEx913: 1-PLL, 3 Outputs
    • CDCEx925: 2-PLL, 5 Outputs
    • CDCEx925: 3-PLL, 7 Outputs
    • CDCEx949: 4-PLL, 9 Outputs
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Settings
  • Flexible Input Clocking Concept
    • External Crystal: 8 MHz to 32 MHz
    • On-Chip VCXO: Pull Range ±150 ppm
    • Single-Ended LVCMOS Up to 160 MHz
  • Free Selectable Output Frequency Up to 230  MHz
  • Low-Noise PLL Core
    • PLL Loop Filter Components Integrated
    • Low Period Jitter (Typical 60 ps)
  • Separate Output Supply Pins
    • CDCE925: 3.3 V and 2.5 V
    • CDCEL925: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable, or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Power Supply
  • Wide Temperature Range: –40°C to 85°C
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
  • APPLICATIONS
    • D-TVs, STBs, IP-STBs, DVD Players, DVD Recorders, and Printers

All other trademarks are the property of their respective owners

The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.

The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8 V for CDCEL925 and 2.5 V to 3.3 V for CDCE925.

The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27-MHz reference input frequency, for example.

All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.

The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.

Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.

The CDCx925 operates in a 1.8-V environment and in a temperature range of –40°C to 85°C.

The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.

The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8 V for CDCEL925 and 2.5 V to 3.3 V for CDCE925.

The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27-MHz reference input frequency, for example.

All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.

The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.

Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.

The CDCx925 operates in a 1.8-V environment and in a temperature range of –40°C to 85°C.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

CDCE925PERF-EVM — CDCE925 Performance Evaluation Module

The CDCE925Perf-Evaluation Module allows the verification of the functionality and performance of CDCE925 and CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables.

User guide: PDF
Not available on TI.com
Evaluation board

CDCEL925PERF-EVM — CDCEL925 Performance Evaluation Module

The CDCEl925PERF-Evaluation Module will help to verify the functionality and performance of CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables. The below information/items can be included: The EVM use's guide: (...)

User guide: PDF
Not available on TI.com
Evaluation board

CDCEL9XXPROGEVM — CDCE(L)949 Family EEPROM Programming Board

The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)

User guide: PDF
Not available on TI.com
Driver or library

SCAC131 Drivers for the CDCEL9xx programmer EVM

Supported products & hardware

Supported products & hardware

Products
Clock generators
CDCE913 Programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE925 Programmable 2-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE937 Programmable 3-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE949 Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCEL913 Programmable 1-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL925 Programmable 2-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL937 Programmable 3-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL949 Programmable 4-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs
Hardware development
Evaluation board
CDCE906-706PROGEVM CDCE906 and CDCE706 programmable EVM CDCE925PERF-EVM CDCE925 Performance Evaluation Module CDCE949PERF-EVM CDCE949 Performance Evaluation Module CDCEL913PERF-EVM CDCEL913 Performance Evaluation Module CDCEL925PERF-EVM CDCEL925 Performance Evaluation Module CDCEL949PERF-EVM CDCEL949 Performance Evaluation Module
Support software

CLOCKPRO ClockPro Software

TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:

  • CDCE949
  • CDCE937
  • CDCE925
  • CDCE913
  • CDCE906
  • CDCE706
  • CDCEL949
  • CDCEL937
  • CDCEL925
  • CDCEL913

It is intended to be used with the evaluation modules of the above devices.

Supported products & hardware

Supported products & hardware

Products
Clock generators
CDCE706 300-MHz, LVCMOS, programmable 3-PLL clock synthesizer / multiplier / divider CDCE906 167-MHz, LVCMOS, programmable 3-PLL clock synthesizer / multiplier / divider CDCE913 Programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE925 Programmable 2-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE937 Programmable 3-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE949 Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCEL913 Programmable 1-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL925 Programmable 2-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL937 Programmable 3-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL949 Programmable 4-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs
Hardware development
Evaluation board
CDCE906-706PROGEVM CDCE906 and CDCE706 programmable EVM CDCE913PERF-EVM CDCE913 Performance Evaluation Module CDCE925PERF-EVM CDCE925 Performance Evaluation Module CDCE949PERF-EVM CDCE949 Performance Evaluation Module CDCEL913PERF-EVM CDCEL913 Performance Evaluation Module CDCEL925PERF-EVM CDCEL925 Performance Evaluation Module CDCEL949PERF-EVM CDCEL949 Performance Evaluation Module CDCEL9XXPROGEVM CDCE(L)949 Family EEPROM Programming Board
Software
Software programming tool
CLOCKPRO ClockPro™ Programming Software
Support software

SCAC073 TI-Pro-Clock Programming Software

Supported products & hardware

Supported products & hardware

Products
Clock generators
CDC706 200-MHz, LVCMOS, custom-programmed 3-PLL clock synthesizer, multiplier & divider CDC906 167-MHz, LVCMOS, custom-programmed 3-PLL clock synthesizer, multiplier & divider CDCE706 300-MHz, LVCMOS, programmable 3-PLL clock synthesizer / multiplier / divider CDCE906 167-MHz, LVCMOS, programmable 3-PLL clock synthesizer / multiplier / divider CDCE913 Programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE925 Programmable 2-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE937 Programmable 3-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCE949 Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs CDCEL913 Programmable 1-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL925 Programmable 2-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL937 Programmable 3-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs CDCEL949 Programmable 4-PLL VCXO clock synthesizer with 1.8-V LVCMOS outputs
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

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