Refer to the PDF data sheet for device specific package drawings
The CSD95378BQ5M NexFET™ smart power stage is a highly optimized design for use in a high-power, high-density synchronous buck converter. This product integrates the driver IC and power MOSFETs to complete the power stage switching function. This combination produces high-current, high-efficiency, and high speed switching capability in a small
5-mm × 6-mm outline package. It also integrates the accurate current sensing and temperature sensing functionality to simplify system design and improve accuracy. In addition, the PCB footprint is optimized to help reduce design time and simplify the completion of the overall system design.
DEVICE | MEDIA | QTY | PACKAGE | SHIP |
---|---|---|---|---|
CSD95378BQ5M | 13-Inch Reel | 2500 | SON 5.00-mm × 6.00-mm Package |
Tape and Reel |
CSD95378BQ5MT | 7-Inch Reel | 250 |
Changes from A Revision (July 2014) to B Revision
Changes from * Revision (April 2014) to A Revision
PIN | DESCRIPTION | |
---|---|---|
NAME | NO. | |
BOOT | 9 | Bootstrap capacitor connection. Connect a minimum of 0.1-µF, 16-V, X7R ceramic capacitor from BOOT to BOOT_R pins. The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is integrated. |
BOOT_R | 8 | Return path for HS gate driver, connected to VSW internally. |
ENABLE | 3 | Enables device operation. If ENABLE = logic HIGH, turns on device. If ENABLE = logic LOW, the device is turned off and both MOSFET gates are actively pulled low. An internal 100-kΩ pulldown resistor will pull the ENABLE pin LOW if left floating. |
FCCM | 10 | This pin enables the Diode Emulation function. When this pin is held LOW, Diode Emulation Mode is enabled for sync FET. When FCCM is HIGH, the device is operated in Forced Continuous Conduction Mode. An internal 5-µA current source will pull the FCCM pin to 3.3 V if left floating. |
IOUT | 1 | Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current. |
PGND | 4 | Power ground, connected directly to pin 13. |
PGND | 13 | Power ground. |
PWM | 12 | Pulse width modulated tri-state input from external controller. Logic LOW sets control FET gate low and sync FET gate high. Logic HIGH sets control FET gate high and sync FET gate low. Open or Hi-Z sets both MOSFET gates low if greater than the tri-state shutdown hold-off time (t3HT). |
REFIN | 2 | External reference voltage input for current sensing amplifier. |
TAO/ FAULT |
11 | Temperature analog output. Reports a voltage proportional to the die temperature. An ORing diode is integrated in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of all the ICs. Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown occurs. TAO should be bypassed to PGND with a 1-nF, 16-V, X7R ceramic capacitor. |
VDD | 5 | Supply voltage to gate driver and internal circuitry. |
VIN | 7 | Input voltage pin. Connect input capacitors close to this pin. |
VSW | 6 | Phase node connecting the HS MOSFET source and LS MOSFET drain - pin connection to the output inductor. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN to PGND | –0.3 | 25 | V | |
VIN to VSW | –0.3 | 25 | V | |
VIN to VSW (10 ns) | –7 | 27 | V | |
VSW to PGND | –0.3 | 20 | V | |
VSW to PGND (10 ns) | –7 | 23 | V | |
VDD to PGND | –0.3 | 7 | V | |
ENABLE, PWM, FCCM. TAO, IOUT, REFIN to PGND | –0.3 | VDD + 0.3 V | V | |
BOOT to BOOT_R(2) | –0.3 | VDD + 0.3 V | V | |
Power dissipation, PD | 12 | W | ||
Operating junction temperature, TJ | –55 | 150 | °C | |
Storage temperature, Tstg | –55 | 150 | °C |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM) | –2000 | 2000 | V |
Charged-device model (CDM) | –500 | 500 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VDD | Gate drive voltage | 4.5 | 5.5 | V | |
VIN | Input supply voltage(1) | 16 | V | ||
VOUT | Output voltage | 5.5 | V | ||
IOUT | Continuous output current | VIN = 12 V, VDD = 5 V, VOUT = 1.2 V, ƒSW = 500 kHz, LOUT = 0.225 µH(2) |
60 | ||
IOUT-PK | Peak output current(3) | 90 | A | ||
ƒSW | Switching frequency | CBST = 0.1 µF (min) | 1250 | kHz | |
On-time duty cycle | ƒSW = 1 MHz | 85% | |||
Minimum PWM on time | 40 | ns | |||
Operating temperature | –40 | 125 | °C |
THERMAL METRIC | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
RθJC | Junction-to-case (top-of-package) thermal resistance(1) | 15 | °C/W | ||
RθJB | Junction-to-board thermal resistance(2) | 1.5 |
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The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
NexFET, E2E are trademarks of Texas Instruments.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
DIM | MILLIMETERS | INCHES | ||||
---|---|---|---|---|---|---|
MIN | NOM | MAX | MIN | NOM | MAX | |
A | 1.400 | 1.450 | 1.500 | 0.057 | 0.059 | 0.061 |
a1 | 0.000 | 0.000 | 0.050 | 0.000 | 0.000 | 0.002 |
b | 0.200 | 0.250 | 0.320 | 0.008 | 0.010 | 0.013 |
b1 | 2.750 TYP | 0.108 TYP | ||||
b2 | 0.200 | 0.250 | 0.320 | 0.008 | 0.010 | 0.013 |
b3 | 0.250 TYP | 0.010 TYP | ||||
c1 | 0.150 | 0.200 | 0.250 | 0.006 | 0.008 | 0.010 |
c2 | 0.200 | 0.250 | 0.300 | 0.008 | 0.010 | 0.012 |
D2 | 5.300 | 5.400 | 5.500 | 0.209 | 0.213 | 0.217 |
d | 0.200 | 0.250 | 0.300 | 0.008 | 0.010 | 0.012 |
d1 | 0.350 | 0.400 | 0.450 | 0.014 | 0.016 | 0.018 |
d2 | 1.900 | 2.000 | 2.100 | 0.075 | 0.079 | 0.083 |
E | 5.900 | 6.000 | 6.100 | 0.232 | 0.236 | 0.240 |
E1 | 4.900 | 5.000 | 5.100 | 0.193 | 0.197 | 0.201 |
E2 | 3.200 | 3.300 | 3.400 | 0.126 | 0.130 | 0.134 |
e | 0.500 TYP | 0.020 TYP | ||||
K | 0.350 TYP | 0.014 TYP | ||||
L | 0.400 | 0.500 | 0.600 | 0.016 | 0.020 | 0.024 |
L1 | 0.210 | 0.310 | 0.410 | 0.008 | 0.012 | 0.016 |
θ | 0.00 | — | — | 0.00 | — | — |
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