SLASFK2 Data sheet

SLASFK2 December 2024 DAC121S101-SEP

PRODUCTION DATA

Refer to the PDF data sheet for device specific package drawings

5.8 Typical Characteristics

at f_SCLK = 30MHz, T_A = 25°C, and input code range = 48 to 4047 (unless otherwise noted)

	V_A = 3V

Figure 5-2 DNL vs Output Code

	V_A = 3V

Figure 5-4 INL vs Output Code

Figure 5-6 DNL vs Supply Voltage

Figure 5-8 3V DNL vs Clock Frequency

Figure 5-10 3V DNL vs Clock Duty Cycle

Figure 5-12 3V DNL vs Temperature

Figure 5-14 5V INL vs Clock Frequency

Figure 5-16 5V INL vs Clock Duty Cycle

Figure 5-18 5V INL vs Temperature

Figure 5-20 Zero Code Error vs Clock Duty Cycle

Figure 5-22 Full-Scale Error vs Clock Frequency

Figure 5-24 Full-Scale Error vs Temperature

Figure 5-26 Supply Current vs Temperature

Figure 5-28 Power-On Reset

Figure 5-30 5V Wake-Up Time

	V_A = 5V

Figure 5-3 DNL vs Output Code

	V_A = 5V

Figure 5-5 INL vs Output Code

Figure 5-7 INL vs Supply Voltage

Figure 5-9 5V DNL vs Clock Frequency

Figure 5-11 5V DNL vs Clock Duty Cycle

Figure 5-13 3V INL vs Clock Frequency

Figure 5-15 3V INL vs Clock Duty Cycle

Figure 5-17 3V INL vs Temperature

Figure 5-19 Zero Code Error vs Clock Frequency

Figure 5-21 Zero Code Error vs Temperature

Figure 5-23 Full-Scale Error vs Clock Duty Cycle

Figure 5-25 Supply Current vs Supply Voltage

Figure 5-27 5V Glitch Response

Figure 5-29 3V Wake-Up Time