SLASFK2 December   2024 DAC121S101-SEP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 DAC Section
      2. 6.3.2 Resistor String
      3. 6.3.3 Output Amplifier
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power-On Reset
      2. 6.4.2 Power-Down Modes
    5. 6.5 Programming
      1. 6.5.1 Serial Interface
      2. 6.5.2 Input Shift Register
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bipolar Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The DAC121S101-SEP device is a full-featured, general-purpose, 12-bit voltage-output digital-to-analog converter (DAC) with a 12µs (typ) settling time. Control of the output of the DAC is achieved over a 3-wire SPI. After the DAC output is set, additional communication with the DAC is not required unless the output condition must be changed. Likewise, the DAC121S101-SEP power-on state is 0V. The DAC output remains at 0V until a valid write sequence is made.

A unique benefit of the DAC121S101-SEP is the logic levels of the SPI input pins. The logic levels of SCLK, DIN, and SYNCB are independent of VA. As a result, the DAC121S101-SEP can operate at a supply voltage (VA) that is higher than the microcontroller controlling the DAC. This feature is advantageous in applications where the analog circuitry is being run at 5V to maximize signal-to-noise ratio, and digital logic is running at 3V to conserve power.