SLASFK2 December 2024 DAC121S101-SEP
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
For best accuracy and minimum noise, the printed-circuit-board (PCB) that contains the DAC121S101-SEP must have separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes. Both of these planes must be located in the same board layer. Use a single ground plane; a single ground plane is preferred if digital return current does not flow through the analog ground area. Frequently a single ground plane design uses a fencing technique to prevent the mixing of analog and digital ground current. Only use separate ground planes when the fencing technique is inadequate. Connect the separate ground planes in one place, preferably near the DAC121S101-SEP. Take special care to make sure digital signals with fast edge rates do not pass over split ground planes. The digital signals must always have a continuous return path below the traces.
Avoid crossover of analog and digital signals and keep the clock and data lines on the component side of the board. The clock and data lines must have controlled impedance.