SLASFK2 Data sheet

SLASFK2 December 2024 DAC121S101-SEP

PRODUCTION DATA

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

DGK|8

Thermal pad, mechanical data (Package|Pins)

Orderable Information

5.5 Electrical Characteristics

all minimum and maximum values at –55°C ≤ T_A ≤ +125°C and all typical values at T_A = 25°C, 2.7V ≤ V_A ≤ 5.5V, DAC output pin (VOUT) loaded with resistive load (R_L = 2kΩ to AGND) and capacitive load (C_L = 200pF to AGND), f_SCLK = 30MHz, and input code range: 48d to 4047d (unless otherwise noted)

PARAMETER		TEST CONDITIONS			MIN	TYP	MAX	UNIT
STATIC PERFORMANCE
	Resolution⁽¹⁾				12			Bits
	Monotonicity⁽¹⁾				12			Bits
INL	Integral nonlinearity				–11	±2.6	11	LSB
DNL	Differential nonlinearity	V_A = 2.7V		Minimum	–0.7	–0.15		LSB
		V_A = 2.7V		Maximum		0.35	1
		V_A = 5.5V		Minimum	–0.7	–0.15
		V_A = 5.5V		Maximum		0.25	1
ZE	Zero-code error	I_OUT = 0mA				4	16	mV
ZCED	Zero-code error drift					–20		µV/°C
GE	Gain error	All ones loaded to DAC register				±1		%FSR
TC GE	Gain-error temperature coefficient	V_A = 3V				–0.7		ppm/°C
TC GE	Gain-error temperature coefficient	V_A = 5V				–1		ppm/°C
FSE	Full-scale error	I_OUT = 0mA				–0.07	–1	%FSR
OUTPUT
	Output voltage⁽¹⁾				0		V_A	V
ZCO	Zero-code output⁽¹⁾	V_A = 3V, I_OUT = 10μA					1.8	mV
		V_A = 3V, I_OUT = 100μA					5
		V_A = 5V, I_OUT = 10μA					3.7
		V_A = 5V, I_OUT = 100μA					5.4
FSO	Full-scale output⁽¹⁾	V_A = 3V, I_OUT = 10μA					2.997	V
		V_A = 3V, I_OUT = 100μA					2.99
		V_A = 5V, I_OUT = 10μA					4.995
		V_A = 5V, I_OUT = 100μA					4.992
C_L	Capacitive load⁽¹⁾	R_L = ∞					1500	pF
I_OS	Short-circuit current⁽¹⁾	V_A = 5V, V_OUT = 0V, DAC code = FFFh					–63	mA
		V_A = 3V, V_OUT = 0V, DAC code = FFFh					–50
		V_A = 5V, V_OUT = 5V, DAC code = 000h					74
		V_A = 3V, V_OUT = 3V, DAC code = 000h					53
	DC output impedance⁽¹⁾						1.3	Ω
DYNAMIC PERFORMANCE
t_s	Output voltage settling time⁽¹⁾	400h to C00h code change	C_L≤ 200pF				10	µs
		400h to C00h code change	C_L = 500pF			12
		00Fh to FF0h code change	C_L≤ 200pF			8
		00Fh to FF0h code change	C_L = 500pF			12
SR	Output slew rate					1		V/µs
	Code change glitch impulse	800h to 7FFh code change				12		nV-s
	Digital feedthrough	800h to 7FFh code change				0.5		nV-s
t_WU	Wake-up time	V_A = 5V				6		µs
t_WU	Wake-up time	V_A = 3V				39		µs
DIGITAL INPUTS
I_IN	Input current⁽¹⁾				−1		1	μA
V_IL	Input low voltage⁽¹⁾	V_A = 5V					0.8	V
V_IL	Input low voltage⁽¹⁾	V_A = 3V					0.5	V
V_IH	Input high voltage⁽¹⁾	V_A = 5V			2.4			V
V_IH	Input high voltage⁽¹⁾	V_A = 3V			2.1			V
C_IN	Pin capacitance⁽¹⁾						3	pF
POWER
I_A	Supply current	Output unloaded, normal mode, f_SCLK = 30MHz	V_A = 5.5V				312	µA
		Output unloaded, normal mode, f_SCLK = 30MHz	V_A = 3.6V				217
		Output unloaded, normal mode, f_SCLK = 20MHz⁽¹⁾	V_A = 5.5V				279
		Output unloaded, normal mode, f_SCLK = 20MHz⁽¹⁾	V_A = 3.6V				197
		Output unloaded, normal mode, f_SCLK = 0MHz⁽¹⁾	V_A = 5.5V				153
		Output unloaded, normal mode, f_SCLK = 0MHz⁽¹⁾	V_A = 3.6V				118
		Output unloaded, all PD modes, f_SCLK = 30MHz⁽¹⁾	V_A = 5V				84
		Output unloaded, all PD modes, f_SCLK = 30MHz⁽¹⁾	V_A = 3V				42
		Output unloaded, all PD modes, f_SCLK = 20MHz⁽¹⁾	V_A = 5V				56
		Output unloaded, all PD modes, f_SCLK = 20MHz⁽¹⁾	V_A = 3V				28
		Output unloaded, all PD modes, f_SCLK = 0MHz	V_A = 5.5V			0.15	1.4
P_C	Power consumption	Output unloaded, normal mode, f_SCLK = 30MHz	V_A = 5.5V				1.72	mW
		Output unloaded, normal mode, f_SCLK = 30MHz	V_A = 3.6V				0.78
		Output unloaded, normal mode, f_SCLK = 20MHz⁽¹⁾	V_A = 5.5V				1.53
		Output unloaded, normal mode, f_SCLK = 20MHz⁽¹⁾	V_A = 3.6V				0.71
		Output unloaded, normal mode, f_SCLK = 0MHz⁽¹⁾	V_A = 5.5V				0.84
		Output unloaded, normal mode, f_SCLK = 0MHz⁽¹⁾	V_A = 3.6V				0.42
		Output unloaded, all PD modes, f_SCLK = 30MHz⁽¹⁾	V_A = 5V				0.42	µW
		Output unloaded, all PD modes, f_SCLK = 30MHz⁽¹⁾	V_A = 3V				0.13
		Output unloaded, all PD modes, f_SCLK = 20MHz⁽¹⁾	V_A = 5V				0.28
		Output unloaded, all PD modes, f_SCLK = 20MHz⁽¹⁾	V_A = 3V				0.08
		Output unloaded, all PD modes, f_SCLK = 0MHz	V_A = 5.5V			0.825	7.7
I_OUT / I_A	Power efficiency	I_LOAD = 2mA	V_A = 5V			91		%
I_OUT / I_A	Power efficiency	I_LOAD = 2mA	V_A = 3V			94		%

(1) Specified by design and characterization, not production tested.