SLASF60 april 2023 DAC53204-Q1 , DAC63204-Q1
PRODUCTION DATA
The address byte, as shown in Table 7-15, is the first byte received from the controller device following the start condition. The first four bits (MSBs) of the address are factory preset to 1001. The next three bits of the address are controlled by the A0 pin. The A0 pin input can be connected to VDD, AGND, SCL, or SDA. The A0 pin is sampled during the first byte of each data frame to determine the address. The device latches the value of the address pin, and consequently responds to that particular address according to Table 7-16.
COMMENT | MSB | LSB | ||||||
---|---|---|---|---|---|---|---|---|
— | AD6 | AD5 | AD4 | AD3 | AD2 | AD1 | AD0 | R/W |
General address | 1 | 0 | 0 | 1 | See Table 7-16
(target address column) |
0 or 1 | ||
Broadcast address | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
TARGET ADDRESS | A0 PIN |
---|---|
000 | AGND |
001 | VDD |
010 | SDA |
011 | SCL |
The DACx3204‑Q1 supports broadcast addressing, which is used for synchronously updating or powering down multiple DACx3204‑Q1 devices. When the broadcast address is used, the DACx3204‑Q1 responds regardless of the address pin state. Broadcast is supported only in write mode.