SBAS438C May   2008  – November 2019 DAC9881

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Block Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: AVDD = 5 V
    6. 6.6  Electrical Characteristics: AVDD = 2.7 V
    7. 6.7  Timing Requirements—Standalone Operation Without SDO
    8. 6.8  Timing Requirements—Standalone Operation With SDO and Daisy-Chain Mode
    9. 6.9  Typical Characteristics: AVDD = 5 V
    10. 6.10 Typical Characteristics: AVDD = 2.7 V
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Output
      2. 7.3.2  Reference Inputs
      3. 7.3.3  Output Range
      4. 7.3.4  Input Data Format
      5. 7.3.5  Hardware Reset
      6. 7.3.6  Power-On Reset
        1. 7.3.6.1 Program Reset Value
      7. 7.3.7  Power Down
      8. 7.3.8  Double-Buffered Interface
        1. 7.3.8.1 Load DAC Pin (LDAC)
          1. 7.3.8.1.1 Synchronous Mode
          2. 7.3.8.1.2 Asynchronous Mode
      9. 7.3.9  1.8-V to 5-V Logic Interface
      10. 7.3.10 Power-Supply Sequence
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface
        1. 7.4.1.1 Input Shift Register
          1. 7.4.1.1.1 Stand-Alone Mode
          2. 7.4.1.1.2 Daisy-Chain Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bipolar Operation Using the DAC9881
    2. 8.2 Typical Application
      1. 8.2.1 DAC9881 Sample-and-Hold Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 System Example
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Analog Output

The DAC9881 offers a force and sense output configuration for the high open-loop gain output amplifier. This feature allows the loop around the output amplifier to be closed at the load (as shown in Figure 66), thus ensuring an accurate output voltage. The output buffer VOUT and RFB pins are provided so that the output op amp buffer feedback can be connected at the load. Without a driven load, the DAC9881 output typically swings to within 15 mV of the AGND and AVDD supply rails. Because of the high accuracy of these DACs, system design problems such as grounding and wiring resistance become very important. A 18-bit converter with a 5-V full-scale range has an LSB value of 19 µV. The DAC9881 has a typical feedback resistor current of 0.5 mA; thus, a series wiring resistance of only 100 mΩ (RW1) causes a voltage drop of 50 µV. In terms of a system layout, the resistivity of a typical 1-ounce copper-clad printed circuit board (PCB) is 0.5-mΩ per square. For a 0.5-mA current, a 0.25-mm wide printed-circuit conductor 25-mm long results in a voltage drop of 25 µV.

NOTE

the wiring resistance of RW2 is not critical as long as the feedback resistor (RFB) is connected at the driven load.

DAC9881 ai_analog_config_bas438.gifFigure 66. Analog Output Closed-Loop Configuration
(RW1 and RW2 Represent Wiring Resistance)