SBAS438C May   2008  – November 2019 DAC9881

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: AVDD = 5 V
    6. 6.6  Electrical Characteristics: AVDD = 2.7 V
    7. 6.7  Timing Requirements—Standalone Operation Without SDO
    8. 6.8  Timing Requirements—Standalone Operation With SDO and Daisy-Chain Mode
    9. 6.9  Typical Characteristics: AVDD = 5 V
    10. 6.10 Typical Characteristics: AVDD = 2.7 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Output
      2. 7.3.2  Reference Inputs
      3. 7.3.3  Output Range
      4. 7.3.4  Input Data Format
      5. 7.3.5  Hardware Reset
      6. 7.3.6  Power-On Reset
        1. 7.3.6.1 Program Reset Value
      7. 7.3.7  Power Down
      8. 7.3.8  Double-Buffered Interface
        1. 7.3.8.1 Load DAC Pin (LDAC)
          1. 7.3.8.1.1 Synchronous Mode
          2. 7.3.8.1.2 Asynchronous Mode
      9. 7.3.9  1.8-V to 5-V Logic Interface
      10. 7.3.10 Power-Supply Sequence
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface
        1. 7.4.1.1 Input Shift Register
          1. 7.4.1.1.1 Stand-Alone Mode
          2. 7.4.1.1.2 Daisy-Chain Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bipolar Operation Using the DAC9881
    2. 8.2 Typical Application
      1. 8.2.1 DAC9881 Sample-and-Hold Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 System Example
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1 Overview

The DAC9881 is a single-channel, 18-bit, serial-input, voltage-output digital-to-analog converter (DAC). The architecture is an R-2R ladder configuration with the four MSBs segmented, followed by an operational amplifier that serves as a buffer, as shown in Figure 64. The on-chip output buffer allows rail-to-rail output swings while providing a low output impedance to drive loads. The DAC9881 operates from a single analog power supply that ranges from 2.7 V to 5.5 V, and typically consumes 850 μA when operating with a 5-V supply. Data are written to the device in a 24-bit word format, using an SPI serial interface. To enable compatibility with 1.8-V, 3-V, or 5-V logic families, an IOVDD supply pin is provided. This pin allows the DAC9881 input and output logic to be powered from the same logic supply used to interface signals to and from the device. Internal voltage translators are included in the DAC9881 to interface digital signals to the device core. See Figure 65 for the basic configuration of the DAC9881.

To provide a known power-up state, the DAC9881 is designed with a power-on reset function. Upon power-up, the DAC9881 is reset to either zero-scale or midscale depending on the state of the RSTSEL pin. A hardware reset can be performed by using the RST and RSTSEL pins.

DAC9881 ai_arch_bas438.gifFigure 64. DAC9881 Architecture
DAC9881 ai_basic_config_bas438.gifFigure 65. Basic Configuration