DLPS119B December 2018 – May 2022 DLP2010NIR
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Over operating free-air temperature range (unless otherwise noted)(10)
PARAMETER | TEST CONDITIONS(2) | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
CURRENT | ||||||
IDD | Supply current: VDD(3) (5) | VDD = 1.95 V | 34.7 | mA | ||
VDD = 1.8 V | 27.5 | |||||
IDDI | Supply current: VDDI(3) (5) | VDDI = 1.95 V | 9.4 | mA | ||
VDD = 1.8 V | 6.6 | |||||
IOFFSET | Supply current: VOFFSET(4) (6) | VOFFSET = 10.5 V | 1.7 | mA | ||
VOFFSET = 10 V | 0.9 | |||||
IBIAS | Supply current: VBIAS(4) (6) | VBIAS = 18.5 V | 0.4 | mA | ||
VBIAS = 18 V | 0.2 | |||||
IRESET | Supply current: VRESET(6) | VRESET = –14.5 V | 2 | mA | ||
VRESET = –14 V | 1.2 | |||||
POWER(1) | ||||||
PDD | Supply power dissipation: VDD(3) (5) | VDD = 1.95 V | 67.7 | mW | ||
VDD = 1.8 V | 49.5 | |||||
PDDI | Supply power dissipation: VDDI(3) (5) | VDDI = 1.95 V | 18.3 | mW | ||
VDD = 1.8 V | 11.9 | |||||
POFFSET | Supply power dissipation: VOFFSET(4) (6) | VOFFSET = 10.5 V | 17.9 | mW | ||
VOFFSET = 10 V | 9 | |||||
PBIAS | Supply power dissipation: VBIAS(4) (6) | VBIAS = 18.5 V | 7.4 | mW | ||
VBIAS = 18 V | 3.6 | |||||
PRESET | Supply power dissipation: VRESET(6) | VRESET = –14.5 V | 29 | mW | ||
VRESET = –14 V | 16.8 | |||||
PTOTAL | Supply power dissipation: Total | 90.8 | 140.3 | mW | ||
LPSDR INPUT(7) | ||||||
VIH(DC) | DC input high voltage(9) | 0.7 × VDD | VDD + 0.3 | V | ||
VIL(DC) | DC input low voltage(9) | –0.3 | 0.3 × VDD | V | ||
VIH(AC) | AC input high voltage(9) | 0.8 × VDD | VDD + 0.3 | V | ||
VIL(AC) | AC input low voltage(9) | –0.3 | 0.2 × VDD | V | ||
∆VT | Hysteresis ( VT+ – VT– ) | Figure 6-10 | 0.1 × VDD | 0.4 × VDD | V | |
IIL | Low–level input current | VDD = 1.95 V; VI = 0 V | –100 | nA | ||
IIH | High–level input current | VDD = 1.95 V; VI = 1.95 V | 100 | nA | ||
LPSDR OUTPUT(8) | ||||||
VOH | DC output high voltage | IOH = –2 mA | 0.8 × VDD | V | ||
VOL | DC output low voltage | IOL = 2 mA | 0.2 × VDD | V | ||
CAPACITANCE | ||||||
CIN | Input capacitance LPSDR | ƒ = 1 MHz | 10 | pF | ||
Input capacitance SubLVDS | ƒ = 1 MHz | 20 | pF | |||
COUT | Output capacitance | ƒ = 1 MHz | 10 | pF | ||
CRESET | Reset group capacitance | ƒ = 1 MHz; (480 × 108) micromirrors | 95 | 113 | pF |