DLPS097A August 2017 – February 2023 DLP650NE
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Knowing the long-term average landed duty cycle (of the end product or application) is important because subjecting all (or a portion) of the DMD’s micromirror array (also called the active array) to an asymmetric landed duty cycle for a prolonged period of time can reduce the DMD’s usable life.
Note that it is the symmetry/asymmetry of the landed duty cycle that is of relevance. The symmetry of the landed duty cycle is determined by how close the two numbers (percentages) are to being equal. For example, a landed duty cycle of 50/50 is perfectly symmetrical whereas a landed duty cycle of 100/0 or 0/100 is perfectly asymmetrical.
Individual DMD mirror duty cycles vary by application as well as the mirror location on the DMD within any specific application. DMD mirror useful life are maximized when every individual mirror within a DMD approaches 50/50 (or 1/1) duty cycle. Therefore, for the DLPC4430 and DLP650NE chipset, it is recommended that the DMD Idle Mode be enabled as often as possible. Examples are whenever the system is idle, the illumination is disabled, between sequential pattern exposures (if possible), or when the exposure pattern sequence is stopped for any reason. This software mode provides a 50/50 duty cycle across the entire DMD mirror array, where the mirrors are continuously flipped between the on and off states. Refer to the DLPC4430 Software Programmer’s Guide for a description of the DMD Idle Mode command. For the DLPC910 and DLP650NE chipset, it is recommended that the controlling applications processor provide a 50/50 pattern sequence to the DLPC910 for display on the DLP650NE as often as possible, similar to the above examples stated for the DLPC4430. The pattern provides a 50/50 duty cycle across the entire DMD mirror array, where the mirrors are continuously flipped between the ON and OFF states.