DLPS167A March 2024 – September 2024 DLPC964
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Bit(s) | Description | Reset | Type | Notes |
---|---|---|---|---|
3:0 | Fieldname: HSI_CH2DMDCLK_GTCTRL_TXDIFFCTRL_FLD | 0x9 | r/w | |
Channel 2 DMD clock TX driver swing control. Default b1001 = 866mV | ||||
7:4 | UNUSED | 0x0 | ||
12:8 | Fieldname: HSI_CH2DMDCLK_GTCTRL_TXPOST_FLD | 0x0 | r/w | |
Channel 2 DMD clock TX post-cursor control. Default b0000 = 0dB | ||||
15:13 | UNUSED | 0x0 | ||
20:16 | Fieldname: HSI_CH2DMDCLK_GTCTRL_TXPRE_FLD | 0x0 | r/w | |
Channel 2 DMD clock TX pre-cursor control. Default b0000 = 0dB | ||||
31:21 | UNUSED | 0x0 |