DLPS167A March 2024 – September 2024 DLPC964
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The SELF_TEST_REG Register contains the PRBS7 Test Enable and LS BUS Test Enable bits. Writing a '1' to either bit will enable the integrity and interface connection test, as described below.
Bit(s) | Description | Reset | Type | Notes |
---|---|---|---|---|
0 | Fieldname: PRBS7_TEST_EN | 0x0 | w | |
Write ‘1’to this bit to start the DMD interface PRBS7 integrity test. | ||||
Write ‘1’ to trigger operation (bit will self-cleared back to ‘0’). Read of this bit will always return value of ‘0’. | ||||
1 | Fieldname: LSBUS_TEST_EN | 0x0 | w | |
Write to this bit to start the DMD LS bus interface connection test | ||||
Write ‘1’ to trigger operation (bit will self-cleared back to ‘0’). Read of this bit will always return value of ‘0’. | ||||
31:2 | UNUSED | 0x0 |