SNLS647G december 2019 – july 2023 DP83826E , DP83826I
PRODUCTION DATA
Active sleep mode reduces power consumption when no link partner is connected. The feature can be enabled during initialization of the PHY by writing the correct bit to the PHYSCR register. The feature can be verified by reading the BISCR register.
Once Active Sleep in enabled and when the PHY does not detect a cable connection, the PHY automatically enters active sleep mode. When the device enters this mode, all internal circuitry shuts down except for the SMI circuitry and energy detection circuitry on the TD± and RD± pins. In active sleep mode, the device transmits normal link pulses (NLP) every 1.4 seconds to check for the presence of a link partner. When a link partner is detected, the PHY automatically switches back to Normal mode, powering the rest of the internal circuitry.
The device enables active sleep mode by setting bits[14:12] = 0b110 in the PHY Specific Control Register (PHYSCR, address 0x0011).