SNLS767A April   2024  – October 2024 DP83TC817S-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison Table
  6. 5Application Information
    1. 5.1 MAC Security
    2. 5.2 Time Syncronization
    3. 5.3 TC10 Sleep Wake-up
    4. 5.4 DP83TC817EVM-MC and Software Support
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information
    1. 8.1 Package Option Addendum
      1. 8.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The DP83TC817S-Q1 is an IEEE 802.3bw and Open Alliance (OA) compliant automotive qualified 100Base-T1 Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data over unshielded/shielded single twisted-pair cables with xMII interface flexibility.

The DP83TC817S-Q1 integrates IEEE 802.1AE line rate security with authentication and optional encryption support to secure communication over the network. The PHY supports up to 16 secure association (SA) channels with automatic SAK rollover and extended packet numbering support. DP83TC817S-Q1 offers ingress classification to filter the unwanted packets & supports WAN MACsec for end-to-end security.

The DP83TC817S-Q1 integrates IEEE802.1AS / IEEE1588v2 to enable highly accurate time synchronization and hardware time stamping for time-sensitive, real-time controlled applications, with support for encrypted PTP packets.

The DP83TC817S-Q1 supports OA TC-10 low power sleep feature with wake forwarding for reduced system power consumption when communication is not required.

The DP83TC817S-Q1 is footprint compatible to TI's 100BASE-T1 PHYs and 1000BASE-T1 PHYs enabling design scalability with a single board for different speeds and features.

Device Information
PART NUMBER PACKAGE (1) BODY SIZE (NOM) (2)
DP83TC817S-Q1 VQFN (36) 6.00mm × 6.00mm
(1) For all available packages, see Mechanical, Packaging and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
DP83TC817S-Q1 Simplified SchematicsSimplified Schematics