SLOS861C March 2015 – January 2023 DRV2700
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The boost or flyback output voltage is programmed by an external network as shown in Figure 8-3.
Depending on which configuration or mode is used in the system, use Equation 1 to calculate the output voltage.
where
The BST pin should be programmed to a value 5-V greater than the largest peak voltage in the system expected to allow adequate amplifier headroom. Because the programming range for the boost voltage extends to 105 V, the leakage current through the resistor divider becomes significant. TI recommends that the sum of the resistance of R(FB1) and R(FB2) be greater than 500 kΩ.
The flyback mode configuration may require filtering capacitors to go along with the feedback network to increase the performance at low and high frequencies. Because the charge storage is inversely proportional to the capacitance, use Equation 2 to calculate the values of the capacitors. In general, select a value of 22 pF for C(FB1).
For this design example, because the value of VPP must be negative, the boost + amplifier configuration must be used. Additionally, because the value of VBST must be 5 V more than VP, VBST is set to 65 V. Using Equation 1, the feedback resistors can be found such that RFB1 = 49 × RFB2. Because the total resistance must be greater than 500 kΩ, RFB1= 735 kΩ and RFB2= 15 kΩ.
When resistor values greater than 1 MΩ are used, PCB contamination causes boost voltage inaccuracy. Use caution when soldering large resistences, and clean the area when finished for best results.