SLOS861C March 2015 – January 2023 DRV2700
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The pulldown FET and resistor are used to help speed up the drain the charge on the high-voltage output. Because the FET must be driven from a comparator, an NMOS FET must be used. During normal operation, the VDS of the NMOS is subject to a any value from approximately 0 V when the FET is on, to the output on the flyback configuration (V(HV)) when the FET is off. Therefore, selecting a FET with a VDS breakdown higher than the maximum VHV is required. Additionally, placing a resistor in series with this FET (on the drain side) to limit the current going through the FET is required. This resistor can be sized according to the maximum current allowed per the data sheet of the FET. As an additional measure, a resistor can be placed on the source side to protect the pulldown FET, such that when current flows through the resistor, it raises the source voltage and thereby lowers the VGS and shuts the FET off.
Because this design example is using the boost + amplifier configuration, the pulldown FET and resistors are not required.