SLVSFY8B February 2020 – August 2021 DRV8210
PRODUCTION DATA
The PWM interface can be used to drive dual-coil relays. Section 8.3.2.1 describes the PWM control interface. Figure 9-23 and Figure 9-24 show a schematic and timing diagram for driving a dual-coil relay with the PWM interface.
Table 9-5 shows the logic table for the PWM interface. The descriptions in this table reflect how the input and output states drive the dual coil relay. When Coil1 is driven (OUT1 voltage is at GND), The voltage at OUT2 will go to VM. Because the center tap of the relay is also at VM, no current flows through Coil2. The same is true when Coil2 is driven; Coil1 shorts to VM. The body diodes of the high-side FETs act as freewheeling diodes, so extra external diodes are not needed. Figure 9-25 shows oscilloscope traces for this application.
IN1 | IN2 | OUT1 | OUT2 | DESCRIPTION |
---|---|---|---|---|
0 | 0 | Hi-Z | Hi-Z | Outputs disabled (H-Bridge Hi-Z) |
0 | 1 | L | H | Drive Coil1 |
1 | 0 | H | L | Drive Coil2 |
1 | 1 | L | L | Drive Coil1 and Coil2 (invalid state for a dual-coil latching relay) |