SLVSFY8B February 2020 – August 2021 DRV8210
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLY, DRL (VM) | ||||||
IVM | VM active mode current | IN1 = 0 V, IN2 = 3.3 V | 1.6 | 3.6 | mA | |
IVMQ | VM sleep mode current | INx = 0 V, after waiting tsleep, VVM = 5 V, TJ = 27°C |
1 | 55 | nA | |
tWAKE | Turnon time | Sleep mode to active mode delay | 100 | μs | ||
tAUTOSLEEP | Autosleep turnoff time | Active mode to autosleep mode delay | 0.9 | 2.6 | ms | |
POWER SUPPLIES, DSG (VM, VCC) | ||||||
IVM | VM active mode current | IN1 = 0 V, IN2 = 3.3 V | 1.4 | 3.6 | mA | |
IVMQ | VM sleep mode current | Sleep mode, VVM = 5 V, VVCC = 3.3 V, TJ = 27°C | 1 | 82 | nA | |
IVMQ_UV | VM sleep mode current | INx = 0 V, VVM = 5 V, VVCC < 0.35 V, TJ = 27°C | 2 | 89 | nA | |
IVCC | VCC active mode current | IN1 = 0 V, IN2 = 3.3 V | 0.18 | 3.6 | mA | |
IVCCQ | VCC sleep mode current | Sleep mode, VVM = 5 V, VVCC = 3.3 V, TJ = 27°C | 2.5 | nA | ||
IVCCQ_UV | VCC sleep mode current | INx = 0 V, VVM = 5 V, VVCC < 0.35 V, TJ = 27°C | 35 | nA | ||
tWAKE | Turnon time | Sleep mode to active mode delay | 100 | μs | ||
tAUTOSLEEP | Autosleep turnoff time | Active mode to autosleep mode delay | 0.9 | 2.6 | ms | |
LOGIC-LEVEL INPUTS (INx, IN1/PH, IN2/EN) | ||||||
VIL | Input logic low voltage | 0 | 0.4 | V | ||
VIH | Input logic high voltage | 1.45 | 5.5 | V | ||
VHYS | Input logic hysteresis | 49 | mV | |||
IIL | Input logic low current | VI = 0 V | -1 | 1 | µA | |
IIH | Input logic high current | VI = 3.3 V | 20 | 50 | µA | |
RPD | Input pulldown resistance | To GND | 100 | kΩ | ||
TRI-LEVEL INPUTS (MODE) | ||||||
VTIL | Tri-level input logic low voltage | 0 | 0.22 × VVCC | V | ||
VTIZ | Tri-level input Hi-Z voltage | 0.60 × VVCC | 0.675 × VVCC | V | ||
VTIH | Tri-level input logic high voltage | 0.75 × VVCC | 5.5 | V | ||
RTPD | Tri-level pulldown resistance | to GND | 130 | kΩ | ||
RTPU | Tri-level pullup resistance | to VCC | 75 | kΩ | ||
DRIVER OUTPUTS (OUTx) | ||||||
RDS(on)_HS | High-side MOSFET on resistance | IO = 0.2 A, DRL | 475 | mΩ | ||
RDS(on)_HS | High-side MOSFET on resistance | IO = 0.2 A, DSG | 525 | mΩ | ||
RDS(on)_LS | Low-side MOSFET on resistance | IO = –0.2 A, DRL | 475 | mΩ | ||
RDS(on)_LS | Low-side MOSFET on resistance | IO = –0.2 A, DSG | 525 | mΩ | ||
VSD | Body diode forward voltage | IO = –0.5 A | 1 | V | ||
tRISE | Output rise time | VOUTx rising from 10% to 90% of VVM | 150 | ns | ||
tFALL | Output fall time | VOUTx falling from 90% to 10% of VVM | 150 | ns | ||
tPD | Input to output propagation delay | Input crosses 0.8 V to VOUTx = 0.1×VVM, IO = 1 A | 135 | ns | ||
tDEAD | Output dead time | Internal dead time | 500 | ns | ||
IOUT | Leakage current into OUTx | OUTx is Hi-Z, RL = 20 Ω to VM | 186 | μA | ||
OUTx is Hi-Z, RL = 20 Ω to GND | -3 | nA | ||||
PROTECTION CIRCUITS | ||||||
VUVLO,VM | VM supply undervoltage lockout (UVLO), DRL | Supply rising | 1.65 | V | ||
Supply falling | 1.30 | V | ||||
VUVLO,VCC | VCC supply undervoltage lockout (UVLO), DSG | Supply rising | 1.65 | V | ||
Supply falling | 1.30 | V | ||||
VUVLO_HYS | Supply UVLO hysteresis | Rising to falling threshold | 80 | mV | ||
tUVLO | Supply undervoltage deglitch time | VVM falling (DRL) or VVCC falling (DSG) to OUTx disabled | 3.8 | µs | ||
IOCP | Overcurrent protection trip point | 1.76 | A | |||
tOCP | Overcurrent protection deglitch time | 4.2 | µs | |||
tRETRY | Overcurrent protection retry time | 1.7 | ms | |||
TTSD | Thermal shutdown temperature | 153 | 193 | °C | ||
THYS | Thermal shutdown hysteresis | 22 | °C |